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008			170310s2017 sz a o 001 0 eng d
020			_a3319477242 _q(electronic bk.)
020			_a9783319477244 _q(electronic bk.)
020			_z3319477226
020			_z9783319477220 _q(print)
040			_aN$T _cN$T _dEBLCP _dIDEBK _dGW5XE _dN$T _dYDX _dOCLCF _dNJR _dAZU _dUPM _dVT2 _dOCLCQ _dUAB _dES-MaUEC _bspa
050		4	_aTK7895.M4 _bI574 2017 EB
245	0	0	_aIn search of the next memory : _binside the circuitry from the oldest to the emerging non-volatile memories _cRoberto Gastaldi, Giovanni Campardo, editors.
264		1	_aCham, Switzerland _bSpringer _c2017.
300			_a1 recurso en línea (xviii, 247 páginas) _bilustraciones
336			_aTexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_atext file _bPDF _2rda
500			_aIncluye índice
500			_aSpringerLink _bSpringer Engineering eBooks 2017 English+International
505	0		_aPreface; Contents; Editors and Contributors; 1 Introduction; References; 2 Historical Overview of Solid-State Non-Volatile Memories; 1 The Story; References; 3 Physics and Technology of Emerging Non-Volatile Memories; 1 Challenges in Floating-Gate Memory Scaling; 2 The Future of the Floating-Gate Concept; 2.1 System-Level Management Techniques; 2.2 Dielectric-Materials Engineering; 2.3 Novel Flash Architectures; 3 Alternative Storage Concepts; 3.1 Ferroelectric Memories; 3.2 Magneto-Resistive Memories; 3.3 Phase-Change Memories; 3.4 Resistive RAM.
505	8		_a1 The Role of ECC for Mainstream and Emerging Memory2 Basics of Error Correcting Codes; 2.1 Linear Block Codes-Basic Facts; 2.2 Linear Block Codes Matrix Description; 2.3 Error Correction Performance of Linear Block Codes; 2.4 Code Modifications; 2.5 Technology-Independent Estimates; 3 Interesting Codes; 3.1 Single-Parity-Check Codes; 3.1.1 Definition; 3.1.2 Implementation; 3.2 Hamming Codes; 3.2.1 Definition; 3.2.2 Decoding; 3.2.3 Fully Parallel Implementation; 3.3 BCH Codes; 3.3.1 Primer on Finite Fields; 3.3.2 Definition; 3.3.3 Decoding; 3.3.4 Implementation of BM Decoding.
505	8		_a1 Why Algorithms to Write and Erase Non-volatile Memories?2 Introduction to Flash Algorithms; 3 Write Algorithms for PCMs; 3.1 Introduction; 3.2 Bi-level Programming; 3.3 Multi-level Programming; 4 Phase Distribution in ML Programming; 4.1 Drift Dependence on Programmed Resistance; 4.2 Temperature Dependence on Programmed Resistance; 5 Write Algorithms for ReRAMs; 5.1 ReRAM Technology Overview; 5.2 ReRAM Cell Configuration; 5.3 The Stochastic Variability Problem in ReRAM; 5.4 ReRAM Program Algorithm, an ISPP Implementation; Acknowledgements; References; 8 Error Management.
505	8		_a4 Ferroelectric Memory Architecture5 Cross-Point Array; 6 Write Circuits; 6.1 Introduction; 6.2 Writing PCM Memories; 6.3 Writing ReRAM (Bipolar) and STT-MRAM; 7 Redundancy; 7.1 Introduction; 7.2 Redundancy Schematic; References; 6 Data Sensing in Emerging NVMs; 1 Introduction; 2 Sensing Concept in Flash and DRAM Memory; 3 The Concept of Read Window; 3.1 Sensing Resistance Variations in Memory Cells; 4 Sensing in STT-MRAM; 5 Sensing in Ferroelectric Memories; References; 7 Algorithms to Survive: Programming Operation in Non-Volatile Memories.
505	8		_a4 Scaling Path and Issues in Various Emerging ArchitecturesReferences; 4 Performance Demands for Future NVM; 1 Introduction; 2 Evolution of NAND; 3 Exploiting the 3rd Dimension: 3D NAND; 4 Breakthrough Approach: Emerging Memories; 4.1 Phase Change Memories (PCM); 4.2 Resistive RAMs (ReRAM); 4.3 The Challenge of Dram Replacement: STT-RAM and FeRAM; 4.4 Ferroelectric Memories (FeRAM); 4.5 Final Considerations; References; 5 Array Organization in Emerging Memories; 1 Introduction; 2 PCM and Array Organization for Unipolar Operation; 3 Bipolar-Operation Array Organization.
520	3		_aThis book provides students and practicing chip designers with an easy-to-follow yet thorough, introductory treatment of the most promising emerging memories under development in the industry. Focusing on the chip designer rather than the end user, this book offers expanded, up-to-date coverage of emerging memories circuit design. After an introduction on the old solid-state memories and the fundamental limitations soon to be encountered, the working principle and main technology issues of each of the considered technologies (PCRAM, MRAM, FeRAM, ReRAM) are reviewed and a range of topics related to design is explored: the array organization, sensing and writing circuitry, programming algorithms and error correction techniques are reviewed comparing the approach followed and the constraints for each of the technologies considered. Finally the issue of radiation effects on memory devices has been briefly treated. Additionally some considerations are entertained about how emerging memories can find a place in the new memory paradigm required by future electronic systems. This book is an up-to-date and comprehensive introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers and practicing engineers.
650		7	_aInformática _2embne _0(OCoLC)fst01894791 _0 _9139268
700	1		_aCampardo, Giovanni, _eeditor literario
700	1		_aGastaldi, Roberto, _eeditor literario
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=http://link.springer.com/10.1007/978-3-319-47724-4 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
988			_aEBOOK, asignarmaterias, EBSPRINGER_2017C
998			_b02/2018 _dz _e- _zSI
999			_c95550 _d95550 _x1