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001			95483
003			ES-MaUEC
005			20230102112706.0
006			m o d
007			cr cnu|||unuuu
008			170301s2017 sz ob 000 0 eng d
020			_a3319532227 _q(electronic bk.)
020			_a9783319532226 _q(electronic bk.)
020			_z3319532219
020			_z9783319532219 _q(print)
040			_aN$T _cN$T _dIDEBK _dEBLCP _dGW5XE _dNJR _dYDX _dN$T _dCOO _dIOG _dAZU _dUWO _dUPM _dOCLCF _dESU _dZ5A _dJBG _dIAD _dICW _dICN _dOTZ _dOCLCQ _dVT2 _dU3W _dES-MaUEC _bspa
050		4	_aQA76.58 _bW568 2017 EB
100	1		_aWinterstein, Felix, _eautor
245	1	0	_aSeparation logic for high-level synthesis _cFelix Winterstein.
264		1	_aCham, Switzerland _bSpringer _c2017.
300			_a1 recurso en línea
336			_aTexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	0		_aSpringer theses
500			_a"Doctoral thesis accepted by Imperial College London, UK."
500			_aSpringerLink _bSpringer Engineering eBooks 2017 English+International
504			_aIncluye referencias bibliográficas
505	0		_a1. Introduction -- 2. High-level Synthesis of Dynamic Data Structures -- 3. Background -- 4. Heap Partitioning and Parallelisation -- 5. Custom Multi-Cache Architectures -- 6. Conclusion -- Bibliography -- Appendices.
520	3		_aThis book presents novel compiler techniques, which combine a rigorous mathematical framework, novel program analyses and digital hardware design to advance current high-level synthesis tools and extend their scope beyond the industrial?state of the art?. Implementing computation on customised digital hardware plays an increasingly important role in the quest for energy-efficient high-performance computing. Field-programmable gate arrays (FPGAs) gain efficiency by encoding the computing task into the chip?s physical circuitry and are gaining rapidly increasing importance in the processor market, especially after recent announcements of large-scale deployments in the data centre. This is driving, more than ever, the demand for higher design entry abstraction levels, such as the automatic circuit synthesis from high-level languages (high-level synthesis). The techniques in this book apply formal reasoning to high-level synthesis in the context of demonstrably practical applications.<.
650		7	_aDispositivos de almacenamiento de datos _2embne _0(OCoLC)fst00872634 _0 _9670359
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=http://link.springer.com/10.1007/978-3-319-53222-6 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
988			_aEBOOK, asignarmaterias, EBSPRINGER_2017C
998			_b02/2018 _dz _e- _zSI
999			_c95483 _d95483 _x1