000			04754cam a2200445Mu 4500
001			94930
003			ES-MaUEC
005			20230102112639.0
006			m o d
007			cr |n|---|||||
008			161126t20162017sz o 000 0 eng d
020			_a3319450980 _q(electronic bk.)
020			_a9783319450988 _q(electronic bk.)
020			_z3319450972
020			_z9783319450971
035			_a(OCoLC)964403453 _z(OCoLC)964336205
040			_aEBLCP _cEBLCP _dYDX _dOCLCQ _dGW5XE _dOCLCF _dUAB _dIOG _dESU _dJBG _dIAD _dICW _dICN _dOTZ _dU3W _dES-MaUEC _bspa
050		4	_aTK7874 _b.M384 2016 EB
245	0	0	_aMaterials for advanced packaging _cDaniel Lu, C.P. Wong, editors.
250			_a2nd ed.
264		1	_aCham _bSpringer _c[2016]
300			_a1 recurso en línea (974 páginas)
336			_aTexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
500			_a3.5.1.2 Surface-Activated Bonding.
500			_aSpringerLink _bSpringer Engineering eBooks 2017 English+International
505	0		_aPreface; Preface to the First Edition; Contents; Contributors; About the Authors; Chapter 1: 3D Integration Technologies: An Overview; 1.1 Introduction; 1.1.1 Motivation for 3D Integration; 1.1.2 Technology Platforms for 3D Integration and Packaging; 1.2 Major Key Enabling 3D Technologies and Materials; 1.2.1 Typical 3D Integration Process Flows; 1.2.2 Wafer Thinning and Dicing; 1.2.3 Wafer and Chip Stacking; 1.3 TSV Integration Scheme and Process; 1.3.1 TSV Integration Scheme and Process; 1.3.1.1 TSV Integration Scheme; 1.3.1.2 TSV Process Flow; 1.3.1.3 TSV Scaling.
505	8		_a1.3.2 Alternative TSV Process Options1.4 Potential Limitations to 3D System Integration; 1.5 Major Applications of 3D Integration; 1.6 3D Integration Perspectives; References; Chapter 2: Advanced Bonding/Joining Techniques; 2.1 Adhesive Bonding Techniques; 2.1.1 Adhesives in the Electronic Industries; 2.1.1.1 Epoxy Resins; 2.1.1.2 Silicone Resins; 2.1.1.3 Polyimides; 2.1.1.4 Acrylics; 2.1.2 Applications of Adhesives in Electronics; 2.1.2.1 Integrated Circuits; 2.1.2.2 Flexible Circuit; 2.1.2.3 Liquid Crystal Display; 2.1.3 New Adhesives; 2.1.3.1 Liquid Crystal Polymer (LCP).
505	8		_a2.1.3.2 SU 8 Adhesive Bonding2.2 Lead-Free Soldering Processes; 2.2.1 Basic Soldering Processes; 2.2.2 The Fluxless Processes Dealing with Tin Oxides; 2.2.3 Oxidation-Free Fluxless Soldering Technology; 2.3 Bonding Processes Using Silver Indium System for High Temperature Applications; 2.3.1 Silver-Indium Phase Diagram and Reactions at 180C; 2.3.2 Si Chips Bonded to Ag/Cu Substrates Using Ag-In System; 2.3.3 Bonding Silicon Chips to Aluminum Substrates Using Ag-In System Without Flux; 2.3.4 The Strength of High Temperature Ag-In Joints Made Between Copper by Fluxless Low Temperature Processes.
505	8		_a2.3.5 Thermal Cycling Reliability Study of Ag-In Joints Between Si Chips and Cu Substrates Made by Fluxless Processes2.4 Solid-State Bonding Technology; 2.4.1 Introduction to Solid-State Bonding; 2.4.2 Fundamental Principle of Solid-State Bonding; 2.4.3 The Quantum Solid-State Bonding Theory; 2.4.4 Novel Ag-to-Cu Solid-State Bonding a.k.a Direct Bonding; 2.4.5 Cu-to-Ag/Cu Solid-State Bonding; 2.5 Silver Flip-Chip Interconnect Technology; 2.5.1 10mum Silver Flip-Chip Joints Made by 250C Solid-State Bonding Process; References; Chapter 3: Advanced Chip-to-Substrate Connections; 3.1 Introduction.
505	8		_a3.1.1 ITRS Projections for Flip-Chip Connections3.1.2 Electrical Modeling of I/O; 3.1.2.1 Parasitic Inductance of Chip-to-Substrate I/O; 3.1.2.2 Parasitic I/O Capacitance; 3.1.2.3 Characteristic Impedance; 3.1.3 Mechanical Modeling; 3.2 Compliant Solder-Based I/O Structures; 3.2.1 Peripheral-to-Flip-Chip Area Array Structures; 3.2.2 Redistribution Using Area Array Solder I/O; 3.3 Wafer-Scale Compliant I/O; 3.4 Improved Mechanical Performance Solder-Capped Structures; 3.5 Solder-Free Chip-to-Substrate Interconnects; 3.5.1 Copper Interconnects; 3.5.1.1 Thermal-Compression Bonding.
520	3		_aThis book provides a comprehensive overview of the recent developments in advanced packaging. Established techniques are discussed, as well as emerging technologies, in order to provide readers with the most up-to-date developments.
650		7	_aCircuitos integrados _2embne _0(OCoLC)fst01050181 _0 _9139614
700	1		_aLu, Daniel.
700	1		_aWong, C. P.
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=http://link.springer.com/10.1007/978-3-319-45098-8 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
988			_aEBOOK, asignarmaterias, EBSPRINGER_2017B
998			_b02/2018 _dz _e- _zSI
999			_c94930 _d94930 _x1