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008			161118t20172017si ob 000 0 eng d
020			_a9789811031205 _q(electronic bk.)
020			_a9811031207 _q(electronic bk.)
020			_z9789811031199
020			_z9811031193
035			_a(OCoLC)963793716 _z(OCoLC)964292754 _z(OCoLC)964546442 _z(OCoLC)970382772 _z(OCoLC)970619634 _z(OCoLC)974649781 _z(OCoLC)981031774
040			_aYDX _cYDX _dN$T _dIDEBK _dGW5XE _dOCLCQ _dOCLCF _dN$T _dAZU _dMERUC _dUAB _dCOO _dUPM _dVT2 _dUWO _dIOG _dESU _dJBG _dIAD _dICW _dICN _dOTZ _dGZN _dOCLCQ _dMERER _dOCLCQ _dU3W _dES-MaUEC _bspa
050		4	_aTK7895.E42 _bA364 2017 EB
100	1		_aAhmed, Jameel, _eautor
245	1	0	_aFuzzy logic based power-efficient real-time multi-core system _cJameel Ahmed, Mohammed Yakoob Siyal, Shaheryar Najam, Zohaib Najam.
264		1	_aSingapore _bSpringer _c[2017]
264		4	_c2017
300			_a1 recurso en línea
336			_aTexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	0		_aSpringerBriefs in applied sciences and technology, Computational intelligence _x2191-530X
500			_aSpringerLink _bSpringer Engineering eBooks 2017 English+International
504			_aIncluye referencias bibliográficas
505	0		_aMultiprocessors and Cache Memory -- Energy Delay Product and Throughput -- Challenges and Issues in Modern Computer Architectures -- Real-Time Power And Performance Aware System -- Fuzzy Logic Theory.
520	3		_aThis book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors.
650		7	_aArquitectura de ordenador _2embne _0(OCoLC)fst00872026 _0 _9144554
700	1		_aAhmed, Jameel, _eautor
700	1		_aNajam, Shaheryar, _eautor
700	1		_aNajam, Zohaib, _eautor
700	1		_aSiyal, Mohammed Yakoob, _eautor
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=http://link.springer.com/10.1007/978-981-10-3120-5 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
988			_aEBOOK, asignarmaterias, EBSPRINGER_2017A
998			_b02/2018 _dz _e- _zSI
999			_c94894 _d94894 _x1