| 000 | 01568cam a2200385Ii 4500 | ||
|---|---|---|---|
| 999 |
_c94624 _d94624 _x1 |
||
| 001 | 94624 | ||
| 003 | ES-MaUEC | ||
| 005 | 20230102112624.0 | ||
| 006 | m o d | ||
| 007 | cr cnu|||unuuu | ||
| 008 | 160927t20162017sz a ob 001 0 eng d | ||
| 020 |
_a3319341952 _q(electronic bk.) |
||
| 020 |
_a9783319341958 _q(electronic bk.) |
||
| 020 | _z3319341944 | ||
| 020 |
_z9783319341941 _q(print) |
||
| 035 |
_a(OCoLC)959277547 _z(OCoLC)959951338 _z(OCoLC)960088527 |
||
| 040 |
_aGW5XE _cGW5XE _dYDX _dOCLCF _dOCLCQ _dUAB _dIOG _dESU _dZ5A _dJBG _dIAD _dICW _dICN _dOTZ _dTEFOD _dU3W _dES-MaUEC _bspa |
||
| 050 | 4 |
_aTK7868.L6 _bL364 2016 EB |
|
| 100 | 1 |
_aLaMeres, Brock J., _eautor _9670975 |
|
| 245 | 1 | 0 |
_aIntroduction to logic circuits & logic design with VHDL _cBrock J. LaMeres. |
| 250 | _a1st edition. | ||
| 264 | 1 |
_aSwitzerland _bSpringer _c[2016] |
|
| 264 | 4 | _c2017 | |
| 300 |
_a1 recurso en línea (xvi, 475 páginas) _bilustraciones (algunas a color) |
||
| 336 |
_aTexto _btxt _2rdacontent |
||
| 337 |
_aelectrónico _bc _2rdamedia |
||
| 338 |
_arecurso electrónico _bcr _2rdacarrier |
||
| 500 | _aSpringerLink | ||
| 504 | _aIncluye referencias bibliográficas e índice | ||
| 988 | _aEBOOK, asignarmaterias, EBSPRINGER_2017A | ||
| 650 | 7 |
_aCircuitos lógicos _2embne _0(OCoLC)fst01002031 _0 _9139135 |
|
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=http://link.springer.com/10.1007/978-3-319-34195-8 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
| 942 |
_2lcc _cLE |
||
| 998 |
_b02/2018 _dz _e- _zSI |
||