000			01992cam a2200385Ii 4500
001			94433
003			ES-MaUEC
005			20230102112612.0
006			m o d
007			cr cnu|||unuuu
008			160725t20162017sz a ob 001 0 eng d
020			_a3319340603 _q(electronic bk.)
020			_a9783319340609 _q(electronic bk.)
020			_z9783319340593 _q(print)
035			_a(OCoLC)953969145
040			_aN$T _cN$T _dYDXCP _dIDEBK _dGW5XE _dN$T _dIOG _dMERER _dESU _dZ5A _dOCLCQ _dJBG _dIAD _dICW _dICN _dOTZ _dOCLCQ _dAJB _dU3W _dES-MaUEC _bspa
050		4	_aTK7874 _b.M378 2016 EB
100	1		_aMartins, Ricardo, _eautor
245	1	0	_aAnalog integrated circuit design automation : _bplacement, routing and parasitic extraction techniques _cRicardo Martins, Nuno Lourenço, Nuno Horta.
264		1	_aSwitzerland _bSpringer _c[2016]
264		4	_c2017
300			_a1 recurso en línea (xvi, 207 páginas) _bilustraciones (algunas a color)
336			_aTexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
500			_aSpringerLink _bSpringer Engineering eBooks 2017 English+International
504			_aIncluye referencias bibliográficas e índice
505	0		_a1. Introduction -- 2. State-of-the-Art on Analog Layout Automation -- 3. AIDA-L: Architecture and Integration -- 4. Template-based Placer -- 5. Optimization-based Placer -- 6. Fully-Automatic Router -- 7. Empirical-based Parasitic Extractor -- 8. Experimental Results -- 9. Conclusions and Future Work.
650		7	_9139610 _aCircuitos electrónicos _2fast _0(OCoLC)fst00906874 _0
700	1		_aHorta, Nuno C. G., _eautor
700	1		_aLourenço, Nuno, _eautor
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=http://link.springer.com/10.1007/978-3-319-34060-9 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
988			_aEBOOK, asignarmaterias, EBSPRINGER_2017A
998			_b02/2018 _dz _e- _zSI
999			_c94433 _d94433 _x1