000			03297nam a22004215i 4500
001			86861
003			ES-MaUEC
005			20230207040618.0
007			cr nn 008mamaa
008			160708s2016 si | s |||| 0|eng d
020			_a9789811010583
040			_aES-MaUEC
050		4	_aQA76.5 _bL375 2016 EB
082	0	4	_a621.3815
090			_aQA76.5 _bL375 2016
100	1		_aLari, Vahid _0Local _9100908
245	1	0	_aInvasive Tightly Coupled Processor Arrays _cby VAHID LARI
260			_aSingapore _bSpringer _c2016
300			_a1 recurso en línea (XXIII, 149 p.) 52 il., 49 il. col.
336			_aTexto (visual) _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
338			_aonline resource _bcr _2rdacarrier
490	1		_aComputer Architecture and Design Methodologies _x2367-3478
505	0		_aIntroduction -- Invasive Tightly Coupled Processor Arrays -- Self-adaptive Power and Energy Management for TCPAs -- On-Demand Fault Tolerance on Massively Parallel Processor Arrays -- Conclusions and Future Work.
520			_aThis book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desired number of processing elements (PEs) or region within a TCPA exclusively for an application according to performance requirements. It not only presents models for implementing invasion strategies in hardware, but also proposes two distinct design flavors for dedicated hardware components to support invasion control on TCPAs. .
942			_2lcc _cLE
988	0	0	_aEBOOK, EBSPRINGER
650		7	_aMicroprocesadores _9141164 _0comprobar BNE19900994978 _2embne
650		7	_9139610 _aCircuitos electrónicos _0comprobar BNE19900974538 _2embne
650	0	7	_aIngeniería _vCongresos y asambleas _0LocalX _2embne _9670301
830		0	_aComputer Architecture and Design Methodologies _x2367-3478 _9134334 _0Local
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://link.springer.com/book/10.1007/978-981-10-1058-3 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
901			_ai9789811010583
907			_a.b12961395 _b10-10-17 _c21-11-16
998			_am _a_alco _a_vill _b - - _cm _dz _e- _feng _gsi _h0
945			_aQA76.5 L375 2016 EB _g1 _ieBOOK _j0 _lmae _o- _pEUR0.00 _q- _r- _sb _t15 _u0 _v0 _w0 _x0 _y.i11616659 _z30-06-17
999			_c86861 _d86861 _x1