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245	1	0	_a3D Flash Memories _cedited by Rino Micheloni
260			_aDordrecht _bSpringer Netherlands _c2016
300			_a1 recurso en línea (XXII, 380 p.) 396 il., 304 il. col.
336			_aTexto (visual) _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
338			_aonline resource _bcr _2rdacarrier
505	0		_aDedication Page -- Foreword -- Preface -- Introduction -- About the Editor -- Acknowledgements -- 1 The Business of NAND -- 2 Reliability of 3D NAND Flash memories -- 3 3D Stacked NAND Flash memories -- 4 3D Charge Trap NAND Flash memories -- 5 3D Floating Gate NAND Flash memories -- 6 Advanced Architectures for 3D NAND Flash memories with vertical channel -- 7 3D VG-Type NAND Flash memories -- 8 RRAM Cross-point arrays -- 9 3D Multi-Chip Integration and Packaging Technology -- 10 BCH and LDPC Error Correction Codes for NAND Flash memories -- 11 Advanced algebraic and graph-based ECC schemes for modern NVMs -- 12 System-Level Considerations on Design of 3D NAND Flash memories -- Index.
520			_aThis book walks the reader through the next step in the evolution of NAND flash memory technology, namely the development of 3D flash memories, in which multiple layers of memory cells are grown within the same piece of silicon. It describes their working principles, device architectures, fabrication techniques and practical implementations, and highlights why 3D flash is a brand new technology. After reviewing market trends for both NAND and solid state drives (SSDs), the book digs into the details of the flash memory cell itself, covering both floating gate and emerging charge trap technologies. There is a plethora of different materials and vertical integration schemes out there. New memory cells, new materials, new architectures (3D Stacked, BiCS and P-BiCS, 3D FG, 3D VG, 3D advanced architectures); basically, each NAND manufacturer has its own solution. Chapter 3 to chapter 7 offer a broad overview of how 3D can materialize. The 3D wave is impacting emerging memories as well and chapter 8 covers 3D RRAM (resistive RAM) crosspoint arrays. Visualizing 3D structures can be a challenge for the human brain: this is way all these chapters contain a lot of bird�s-eye views and cross sections along the 3 axes. The second part of the book is devoted to other important aspects, such as advanced packaging technology (i.e. TSV in chapter 9) and error correction codes, which have been leveraged to improve flash reliability for decades. Chapter 10 describes the evolution from legacy BCH to the most recent LDPC codes, while chapter 11 deals with some of the most recent advancements in the ECC field. Last but not least, chapter 12 looks at 3D flash memories from a system perspective. Is 14nm the last step for planar cells? Can 100 layers be integrated within the same piece of silicon? Is 4 bit/cell possible with 3D? Will 3D be reliable enough for enterprise and datacenter applications? These are some of the questions that this book helps answering by providing insights into 3D flash memory design, process technology and applications.
650	0	7	_aDispositivos de almacenamiento de datos _9670359 _0LocalX _2embne
650		7	_9139610 _aCircuitos electrónicos _0comprobar BNE19900974538 _2embne
650	0	7	_aInformática _0LocalX _2embne _9139268
700	1		_aMicheloni, Rino. _eeditor literario _9100655 _0Local
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://link.springer.com/book/10.1007/978-94-017-7512-0 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
901			_ai9789401775120
907			_a.b12960044 _b10-10-17 _c21-11-16
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