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020 _a9783658133238
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100 1 _aKumm, Martin
_0Local
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245 1 0 _aMultiple Constant Multiplication Optimizations for Field Programmable Gate Arrays
_cby Martin Kumm
260 _aWiesbaden
_bSpringer Fachmedien Wiesbaden Vieweg
_c2016
300 _a1 recurso en línea (XXXIII, 206 páginas)
_b47 ilustraciones
336 _aTexto
_btxt
_2rdacontent
337 _aelectrónico
_bc
_2rdamedia
338 _arecurso electrónico
_bcr
_2rdacarrier
505 0 _aHeuristic and ILP-Based Optimal Solutions for the Pipelined Multiple Constant Multiplication Problem -- Methods to Integrate Embedded Multipliers, LUT-Based Constant Multipliers and Ternary (3-Input) Adders -- An Optimized Multiple Constant Multiplication Architecture Using Floating Point Arithmetic. .
520 3 _aThis work covers field programmable gate array (FPGA)-specific optimizations of circuits computing the multiplication of a variable by several constants, commonly denoted as multiple constant multiplication (MCM). These optimizations focus on low resource usage but high performance. They comprise the use of fast carry-chains in adder-based constant multiplications including ternary (3-input) adders as well as the integration of look-up table-based constant multipliers and embedded multipliers to get the optimal mapping to modern FPGAs. The proposed methods can be used for the efficient implementation of digital filters, discrete transforms and many other circuits in the domain of digital signal processing, communication and image processing. Contents Heuristic and ILP-Based Optimal Solutions for the Pipelined Multiple Constant Multiplication Problem Methods to Integrate Embedded Multipliers, LUT-Based Constant Multipliers and Ternary (3-Input) Adders An Optimized Multiple Constant Multiplication Architecture Using Floating Point Arithmetic Target Groups Researchers and students of electrical engineering and computer science Practitioners in the area of FPGAs and signal processing or digital arithmetic The Author Martin Kumm is working as a postdoctoral researcher at the University of Kassel. His current research interests are digital arithmetic, digital signal processing and discrete optimization, all in the context of field programmable gate arrays. .
710 2 _aSpringerLink (Online service)
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988 _aEBOOK, asignarmaterias , EBSPRINGER
650 0 7 _aOrdenadores
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650 7 _aMatemáticas aplicadas
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856 4 0 _uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://link.springer.com/book/10.1007/978-3-658-13323-8
_zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
901 _ai9783658133238
907 _a.b12956880
_b10-10-17
_c21-11-16
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