000			02865nam a22004215i 4500
001			85876
003			ES-MaUEC
005			20230207040532.0
007			cr nn 008mamaa
008			160411s2016 gw | s |||| 0|eng d
020			_a9783319320946
040			_aES-MaUEC
050		4	_aTK7895.E42 _bG667 2016
082	0	4	_a621.3815
100	1		_aGoossens, Sven _0Local _999150
245	1	0	_aMemory Controllers for Mixed-Time-Criticality Systems : _bArchitectures, Methodologies and Trade-offs _cby Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens
260			_aCham _bSpringer International Publishing _c2016
300			_a1 recurso en línea (XXVII, 202 páginas) _b78 ilustraciones en color
336			_aTexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
490	0		_aEmbedded Systems _x2193-0155
505	0		_aIntroduction -- Reconfigurable Real-Time Memory Controller Architecture -- Memory Patterns -- Cycle-Accurate SDRAM Power Modeling -- Power/Performance Trade-Offs -- Conservative Open-Page Policy -- Reconfiguration -- Related Work -- Conclusions and Future Work -- Appendix A: ILP Problem Formation -- Appendix B: Memory Specifications -- Appendix C: Code Listings -- Appendix D: List of Acronyms -- Appendix E: List of Symbols.
520	3		_aThis book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.
710	2		_aSpringerLink (Online service) _0Local _9106996
942			_2lcc _cLE
988			_aEBOOK, asignarmaterias , EBSPRINGER
650		7	_aMicroprocesadores _9141164 _0comprobar BNE19900994978 _2embne
650		7	_aElectrónica _0comprobar BNE19900963053 _2embne _9138690
700	1		_aChandrasekar, Karthik _0Local _999151
700	1		_aAkesson, Benny _0Local _999152
700	1		_aGoossens, Kees _0Local _999153
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://link.springer.com/book/10.1007/978-3-319-32094-6 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
901			_ai9783319320946
907			_a.b12951547 _b10-10-17 _c21-11-16
998			_am _a_alco _a_vill _b - - _cm _dz _e- _feng _ggw _h0
945			_aTK7895.E42 G667 2016 EB _g1 _ieBOOK _j0 _lmae _o- _pEUR0.00 _q- _r- _sb _t15 _u0 _v0 _w0 _x0 _y.i11594354 _z06-04-17
999			_c85876 _d85876 _x1