000			03360nam a22004095i 4500
001			84990
003			ES-MaUEC
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007			cr nn 008mamaa
008			160118s2016 gw | s |||| 0|eng d
020			_a9783319240046
040			_aES-MaUEC
050		4	_aQA76.9.A3 _bZ436 2016
082	0	4	_a621.3815
100	1		_aZhang, Chenxin _0Local _997624
245	1	0	_aHeterogeneous Reconfigurable Processors for Real-Time Baseband Processing : _bFrom Algorithm to Architecture _cby Chenxin Zhang, Liang Liu, Viktor Öwall
250			_a1st ed.
260			_aCham _bSpringer International Publishing _c2016
300			_a1 recurso en línea (XIV, 195 páginas) _b81 ilustraciones, 29 ilustraciones en color
336			_aTexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
505	0		_aIntroduction -- Digital Hardware Platforms -- Digital Baseband Processing -- The Reconfigurable Cell Array -- Multi-standard Digital Front-End Processing -- Multi-task MIMO Signal Processing -- Future Multi-user MIMO systems � A Discussion -- Conclusion.-.
520	3		_aThis book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G. �Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration; �Describes a unique design and optimization methodology, applied to different areas and levels, including communication theory, hardware implementation, and software support; �Demonstrates design trade-offs during different development phases and enables readers to apply similar techniques to various applications.
710	2		_aSpringerLink (Online service) _0Local _9106996
942			_2lcc _cLE
988			_aEBOOK, asignarmaterias , EBSPRINGER
650		7	_aMicroprocesadores _9141164 _0comprobar BNE19900994978 _2embne
650		7	_aElectrónica _0comprobar BNE19900963053 _2embne _9138690
700	1		_aLiu, Liang. _928570 _0comprobar BNE19996412418
700	1		_aÖwall, Viktor. _997625 _0Local
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://link.springer.com/book/10.1007/978-3-319-24004-6 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
901			_ai9783319240046
907			_a.b12942686 _b10-10-17 _c21-11-16
998			_am _a_alco _a_vill _b - - _cm _dz _e- _feng _ggw _h0
945			_aQA76.9.A3 Z436 2016 EB _g1 _ieBOOK _j0 _lmae _o- _pEUR0.00 _q- _r- _sb _t15 _u0 _v0 _w0 _x0 _y.i11586990 _z06-04-17
999			_c84990 _d84990 _x1