| 000 | 01474cam a2200385 i 4500 | ||
|---|---|---|---|
| 999 |
_c46813 _d46813 |
||
| 001 | 46813 | ||
| 003 | ES-MaUEC | ||
| 005 | 20230102105747.0 | ||
| 008 | 040920r20001998en a bi 001 0 eng | ||
| 010 | _a98009176 | ||
| 020 | _a047198325X (pbk. : alk. paper) | ||
| 035 | _aSirsi) i9780471983255 | ||
| 035 | _aDLC) 98009176 | ||
| 040 |
_aDLC _cDLC _dES-MaUEC _dUEM |
||
| 050 | 4 |
_aTK7885.7 _b.R87 1998 |
|
| 050 | 0 | 0 |
_aTK7885.7 _bR87 1998 1998 |
| 082 | 0 | 0 | _a621.39/5 |
| 100 | 1 |
_aRushton, Andrew, _d1962- _0Local _969921 |
|
| 245 | 1 | 0 |
_aVHDL for logic synthesis _cAndrew Rushton. |
| 250 | _a2nd ed. | ||
| 260 |
_aChichester ; _aNew York _bJohn Wiley Sons _crepr. 1998 |
||
| 300 |
_a375 páginas _bilustraciones _c25 cm |
||
| 336 |
_aTexto (visual) _btxt _2rdacontent |
||
| 337 |
_asin mediación _bn _2rdamedia |
||
| 338 |
_avolumen _bnc _2rdacarrier |
||
| 504 | _aIncluye referencias bibliográficas | ||
| 650 | 0 | 7 |
_aVHDL (Lenguaje de descripción del soporte físico) _0LocalN _2embne _9160754 |
| 650 | 0 | 7 |
_aCircuitos lógicos _9139135 _2embne |
| 901 | _aocm03559252 | ||
| 907 |
_a.b10539785 _b10-11-17 _c06-01-12 |
||
| 942 |
_2lcc _cMSA |
||
| 945 |
_aTK7885.7 .R87 _b1998 _g1 _i9300692749 _j0 _lmcg _nSTAFF. 55420 _o- _pEUR77.15 _q- _r- _so _t2 _u0 _v0 _w0 _x0 _y.i10719167 _z06-01-12 |
||
| 945 |
_aTK7885.7 .R87 _b1998 _g2 _i9300692687 _j0 _lmcg _nSTAFF. 55421 _o- _pEUR77.15 _q- _r- _s- _t1 _u3 _v0 _w0 _x0 _y.i10719179 _z06-01-12 |
||
| 998 |
_a(2)m _a(2)_vill _b05-01-12 _cm _da _e- _feng _gxxu _h0 |
||