| 000 | 02327nam a22003375i 4500 | ||
|---|---|---|---|
| 999 |
_c401805 _d401805 |
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| 001 | 401805 | ||
| 003 | ES-MaUEC | ||
| 005 | 20240608170542.0 | ||
| 006 | a|||| o|||| 00| 0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 231127s2024 sz | o |||| 0|eng d | ||
| 020 | _a9783031406737 | ||
| 024 | 7 |
_a10.1007/978-3-031-40673-7 _2doi |
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| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
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| 050 | 4 |
_aTK7868 .L6 _b2024 EB |
|
| 100 | 1 |
_aVingron, Shimon Peter, _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9690406 _d1936- |
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| 245 | 1 | 0 |
_aLogic Circuit Design : _bSelected Topics and Methods _cby Shimon P Vingron |
| 250 | _a2nd ed. 2024 | ||
| 264 | 1 |
_aCham _bSpringer International Publishing _c2024 |
|
| 300 | _a1 recurso en línea | ||
| 336 |
_atexto _btxt _2rdacontent |
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| 337 |
_aelectrónico _bc _2rdamedia |
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| 338 |
_arecurso electrónico _bcr _2rdacarrier |
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| 505 | 0 | _aLogic Variables, Logic Formulas, Karnaugh Maps, Reduced Karnaugh Maps -- Tautologies, Propositional Logic -- Canonical and Shegalkin Normal Forms, Minimising Logic Functions, Composition of Circuits -- Theory of Latches, Automata Models, Asynchronous Sequential Circuits, Verifying a Sequential Design -- FBD language for PLC programming. | |
| 520 | _aThe 2nd edition has been thoroughly revised and is intended as a wakeup call in the stagnant and dormant field of switching algebra and logic circuit design. It presents the material in a concise but thorough way. The topics selected are an in-depth presentation of switching algebra, a theory of memory circuits (sometimes called flop flops), a new approach to asynchronous circuits, and a newly added part presenting a unique programming technique (or language) for programmable logic controllers (PLCs). Be ready for the unorthodox and controversial. Presents fundamentally new methods for circuit design; Covers combinational circuits, latches and asynchronous circuits; Includes a unique programming technique for PLCs. | ||
| 988 | _aSpringer_Engineering_2024 | ||
| 650 | 7 |
_2embne _9139135 _aCircuitos lógicos _xDiseño y construcción |
|
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-40673-7 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
| 942 |
_2lcc _cLE |
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| 998 |
_b06/2024 _dz _eIG _zSI |
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