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008			230925s2024 sz | fo |||| 0|eng d
020			_a9783031342332
024	7		_a10.1007/978-3-031-34233-2 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aTK7895 .M4 _b2024 EB
245	0	0	_aIn-Memory Computing Hardware Accelerators for Data-Intensive Applications _cedited by Baker Mohammad, Yasmin Halawani
250			_a1st ed. 2024
264		1	_aCham _bSpringer International Publishing _c2024
300			_a1 recurso en línea
336			_atexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
505	0		_aChapter 1 Data-Centric Computing Paradigm Shift, And Domain-Specific Architecture and Hardware -- Chapter 2 SRAM-based In-Memory Computing: Circuits, Functions, and Applications -- Chapter 3 In and Near-Memory Computing using DRAM -- Chapter 4 MRAM-based In-Memory Computing -- Chapter 5 In-Memory Computing using Phase Change Memory -- Chapter 6 Memristor-Based In-Memory Computing -- Chapter 7 In-Memory Computing using FLASH Memory.
520			_aThis book describes the state-of-the-art of technology and research on In-Memory Computing Hardware Accelerators for Data-Intensive Applications. The authors discuss how processing-centric computing has become insufficient to meet target requirements and how Memory-centric computing may be better suited for the needs of current applications. This reveals for readers how current and emerging memory technologies are causing a shift in the computing paradigm. The authors do deep-dive discussions on volatile and non-volatile memory technologies, covering their basic memory cell structures, operations, different computational memory designs and the challenges associated with them. Specific case studies and potential applications are provided along with their current status and commercial availability in the market. Explains how traditional computer architecture limits data movements (memory wall) and the associated impacts; Discusses computing paradigms such as In-Memory or near-memory computing for emerging applications such as AI; Uses case studies to explain the tradeoff between accuracy, computing complexity, and latency. .
988			_aSpringer_Engineering_2024
650		7	_2embne _9670359 _aDispositivos de almacenamiento de datos
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-34233-2 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b05/2024 _dz _eb _zSI