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003			ES-MaUEC
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008			230911s2024 sz | fo |||| 0|eng d
020			_a9783031379246
024	7		_a10.1007/978-3-031-37924-6 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aT174.7 _b2024 EB
100	1		_aRai, Shubham _d1988- _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9690273
245	1	0	_aDesign Automation and Applications for Emerging Reconfigurable Nanotechnologies _cby Shubham Rai, Akash Kumar
250			_a1st ed. 2024
264		1	_aCham _bSpringer International Publishing _c2024
300			_a1 recurso en línea
336			_atexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
505	0		_aChapter 1. Introduction -- Chapter 2. Preliminaries -- Chapter 3. Exploring Circuit Design Topologies for RFETs -- Chapter 4. Standard Cells and Technology Mapping -- Chapter 5. Logic Synthesis with XOR-Majority Graphs -- Chapter 6. Physical synthesis flow and liberty generation -- Chapter 7. Polymporphic Primitives for Hardware Security -- Chapter 8. Conclusion.
520			_aThis book is a single-source solution for anyone who is interested in exploring emerging reconfigurable nanotechnology at the circuit level. It lays down a solid foundation for circuits based on this technology having considered both manual as well as automated design flows. The authors discuss the entire design flow, consisting of both logic and physical synthesis for reconfigurable nanotechnology-based circuits. The authors describe how transistor reconfigurable properties can be exploited at the logic level to have a more efficient circuit design flow, as compared to conventional design flows suited for CMOS. Further, the book provides insights into hardware security features that can be intrinsically developed using the runtime reconfigurable features of this nanotechnology. Details an entire design automation flow for building circuits based on emerging reconfigurable nanotechnology; Describes logical abstraction for emerging reconfigurable nanotechnology that is essential for building newer circuits; Presents hardware security solutions that use reconfigurable nanotechnology to complement contemporary CMOS circuits.
988			_aSpringer_Engineering_2024
650		7	_2embne _9158453 _aNanotecnología
700	1		_9673021 _aKumar, Akash _eautor
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-37924-6 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b05/2024 _dz _eb _zSI