000			03941nam a22004215i 4500
999			_c395115 _d395115
001			395115
003			ES-MaUEC
005			20230318160637.0
006			a||||fo|||| 00| 0
007			cr nn 008mamaa
008			230318s2022 sz | s |||| 0|eng d
020			_a9783030682453
024	7		_a10.1007/978-3-030-68245-3 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aQA403.5 _b2022 EB
100	1		_aJones, Keith John _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9687442
245	1	4	_aThe Regularized Fast Hartley Transform : _bLow-Complexity Parallel Computation of the FHT in One and Multiple Dimensions _cby Keith John Jones
250			_a2nd edition 2022
264		1	_aCham _bSpringer International Publishing _c2022
300			_a1 recurso en línea (XIX, 320 páginas) _b57 ilustraciones
336			_atexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_aarchivo de texto _bPDF
505	0		_aPart 1: The Discrete Fourier and Hartley Transforms -- Background to Research -- The Real-Data Discrete Fourier Transform -- The Discrete Hartley Transform -- Part 2: The Regularized Fast Hartley Transform -- Derivation of Regularized Formulation of Fast Hartley Transform -- Design Strategy for Silicon-Based Implementation of Regularized Fast Hartley Transform -- Architecture for Silicon-Based Implementation of Regularized Fast Hartley Transform -- Design of CORDIC-Based Processing Element for Regularized Fast Hartley Transform -- Part 3: Applications of Regularized Fast Hartley Transform -- Derivation of Radix-2 Real-Data Fast Fourier Transform Algorithms using Regularized Fast Hartley Transform -- Computation of Common DSP-Based Functions using Regularized Fast Hartley Transform -- Part 4: The Multi-Dimensional Discrete Hartley Transform -- Parallel Reordering and Transfer of Data between Partitioned Memories of Discrete Hartley Transform for 1-D and m-D Cases -- Architectures for Silicon-Based Implementation of m-D Discrete Hartley Transform using Regularized Fast Hartley Transform -- Part 5: Results of Research -- Summary and Conclusions.
520			_aThis book describes how a key signal/image processing algorithm - that of the fast Hartley transform (FHT) or, via a simple conversion routine between their outputs, of the real‑data version of the ubiquitous fast Fourier transform (FFT) - might best be formulated to facilitate computationally-efficient solutions. The author discusses this for both 1-D (such as required, for example, for the spectrum analysis of audio signals) and m‑D (such as required, for example, for the compression of noisy 2-D images or the watermarking of 3-D video signals) cases, but requiring few computing resources (i.e. low arithmetic/memory/power requirements, etc.). This is particularly relevant for those application areas, such as mobile communications, where the available silicon resources (as well as the battery-life) are expected to be limited. The aim of this monograph, where silicon‑based computing technology and a resource‑constrained environment is assumed and the data is real-valued in nature, has thus been to seek solutions that best match the actual problem needing to be solved.
988			_aSpringer_Engineering_2022
650		7	_2embne _9673891 _aFourier, Análisis de
650		7	_2embne _9686981 _aTransformaciones (Matemáticas)
776	0	8	_iPrinted edition: _z9783030682446
776	0	8	_iPrinted edition: _z9783030682460
776	0	8	_iPrinted edition: _z9783030682477
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-030-68245-3 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b03/2023 _dz _eIG _zSI