000			03785nam a22004215i 4500
001			394491
003			ES-MaUEC
005			20230102123136.0
007			cr nn 008mamaa
008			221124s2022 sz | s |||| 0|eng d
020			_a9783031160271
024	7		_a10.1007/978-3-031-16027-1 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC
100	1		_aBarkalov, Alexander _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut
245	1	0	_aLogic Synthesis for VLSI-Based Combined Finite State Machines _bSynthesis Targeting ASICs, CPLDs and FPGAs _cby Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
250			_a1st edition 2022
264		1	_aCham _bSpringer International Publishing _c2022
300			_a1 recurso en línea (XV, 291 páginas) _b270 illus
336			_atexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_aarchivo de texto _bPDF
490	0		_aLecture Notes in Electrical Engineering _x1876-1119 _v922
505	0		_aControl algorithms and finite state machines -- VLSI-based logic synthesis -- ASIC-based synthesis of CFSMs -- Optimization of ASIC-based CFSMs -- Homogenous CPLD-based synthesis of CFSMs.
520			_aThe book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration. This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips. .
700	1		_aTitarenko, Larysa _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut
700	1		_aMielcarek, Kamil _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut
700	1		_aMazurkiewicz, Małgorzata _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut
700	1		_aKawecka, Elżbieta _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut
776	0	8	_iPrinted edition: _z9783031160264
776	0	8	_iPrinted edition: _z9783031160288
776	0	8	_iPrinted edition: _z9783031160295
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-16027-1 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
988			_aSpringer_Computer_2022
999			_c394491 _d394491