| 000 | 02866nam a2200409 i 4500 | ||
|---|---|---|---|
| 999 |
_c387979 _d387979 _x1 |
||
| 001 | 387979 | ||
| 003 | ES-MaUEC | ||
| 005 | 20231212160800.0 | ||
| 006 | a||||fo|||| 00| 0 | ||
| 007 | cr nn 008aamaa | ||
| 008 | 220601s2020 sz | o |||| 0|eng d | ||
| 020 | _a9783031799112 | ||
| 024 | 7 |
_a10.1007/978-3-031-79911-2 _2doi |
|
| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
||
| 050 | 4 |
_aTK7895 .M4 _b2020 EB |
|
| 100 | 1 |
_aSasao, Tsutomu, _d1950- _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686476 |
|
| 245 | 1 | 0 |
_aIndex Generation Functions _cby Tsutomu Sasao |
| 250 | _a1st edition 2020 | ||
| 264 | 1 |
_aCham _bSpringer International Publishing _c2020 |
|
| 300 | _a1 recurso en línea (XVII, 165 páginas) | ||
| 336 |
_aTexto _btxt _2rdacontent |
||
| 337 |
_aelectrónico _bc _2rdamedia |
||
| 338 |
_arecurso electrónico _bcr _2rdacarrier |
||
| 347 |
_aarchivo de texto _bPDF |
||
| 490 | 0 |
_aSynthesis Lectures on Digital Circuits & Systems _x1932-3174 |
|
| 505 | 0 | _aPreface -- Acknowledgments -- Introduction -- Applications -- Definitions and Basic Properties -- Index Generation Functions and Their Realizations -- Minimization of Primitive Variables -- Linear Transformations of Input Variables -- Iterative Reduction of Compound Variables -- Irreducible Index Generation Function -- SAT-Based Method to Find Linear Transformations -- Statistical Approach -- Realization Using Four IGUs -- References on Index Generation Functions -- Conclusions -- Bibliography -- Author's Biography -- Index. | |
| 520 | _aIndex generation functions are binary-input integer valued functions. They represent functions of content addressable memories (CAMs). Applications include: IP address tables; terminal controllers; URL lists; computer virus scanning circuits; memory patch circuits; list of English words; code converters; and pattern matching circuits. This book shows memory-based realization of index generation functions. It shows: 1. methods to implement index generation functions by look-up table (LUT) cascades and index generation units (IGU), 2. methods to reduce the number of variables using linear transformations, and 3. methods to estimate the sizes of memories, with many illustrations, tables, examples, exercises, and their solutions. | ||
| 988 | _aSynthesis Collection of Technology_2020 | ||
| 650 | 7 |
_2embne _9670359 _aDispositivos de almacenamiento de datos |
|
| 776 | 0 | 8 |
_iPrinted edition: _z9783031799129 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031799105 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031799136 |
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-79911-2 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
| 942 |
_2lcc _cLE |
||
| 998 |
_b05/2023 _dz _eb _zSI |
||