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| 003 | ES-MaUEC | ||
| 005 | 20230505112311.0 | ||
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| 007 | cr nn 008mamaa | ||
| 008 | 220601s2009 sz | o |||| 0|eng d | ||
| 020 | _a9783031797910 | ||
| 024 | 7 |
_a10.1007/978-3-031-79791-0 _2doi |
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| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
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| 050 | 4 |
_aTK7874 _b2009 EB |
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| 100 | 1 |
_aMarshall, Andrew _d1958- _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9688385 |
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| 245 | 1 | 0 |
_aMismatch and Noise in Modern IC Processes _cby Andrew Marshall |
| 250 | _a1st edition 2009 | ||
| 264 | 1 |
_aCham _bSpringer International Publishing _c2009 |
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| 300 | _a1 recurso en línea (X, 139 páginas) | ||
| 336 |
_aTexto _btxt _2rdacontent |
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| 337 |
_aelectrónico _bc _2rdamedia |
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| 338 |
_arecurso electrónico _bcr _2rdacarrier |
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| 347 |
_aarchivo de texto _bPDF |
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| 490 | 0 |
_aSynthesis Lectures on Digital Circuits & Systems _x1932-3174 |
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| 505 | 0 | _aPart I: Mismatch -- Introduction -- Variability and Mismatch in Digital Systems -- Variability and Mismatch in Analog Systems I -- Variability and Mismatch in Analog Systems II -- Lifetime-Induced Variability -- Mismatch in Nonconventional Processes -- Mismatch Correction Circuits -- Part II: Noise -- Component and Digital Circuit Noise -- Noise Effects in Digital Systems -- Noise Effects in Analog Systems -- Circuit Design to Minimize Noise Effects -- Noise Considerations in SOI. | |
| 520 | _aComponent variability, mismatch, and various noise effects are major contributors to design limitations in most modern IC processes. Mismatch and Noise in Modern IC Processes examines these related effects and how they affect the building block circuits of modern integrated circuits, from the perspective of a circuit designer. Variability usually refers to a large scale variation that can occur on a wafer to wafer and lot to lot basis, and over long distances on a wafer. This phenomenon is well understood and the effects of variability are included in most integrated circuit design with the use of corner or statistical component models. Mismatch, which is the emphasis of section I of the book, is a local level of variability that leaves the characteristics of adjacent transistors unmatched. This is of particular concern in certain analog and memory systems, but also has an effect on digital logic schemes, where uncertainty is introduced into delay times, which can reduce margins and introduce 'race' conditions. Noise is a dynamic effect that causes a local mismatch or variability that can vary during operation of a circuit, and is considered in section II. Noise can be the result of atomic effects in devices or circuit interactions, and both of these are discussed in terms of analog and digital circuitry. Table of Contents: Part I: Mismatch / Introduction / Variability and Mismatch in Digital Systems / Variability and Mismatch in Analog Systems I / Variability and Mismatch in Analog Systems II / Lifetime-Induced Variability / Mismatch in Nonconventional Processes / Mismatch Correction Circuits / Part II: Noise / Component and Digital Circuit Noise / Noise Effects in Digital Systems / Noise Effects in Analog Systems / Circuit Design to Minimize Noise Effects / Noise Considerations in SOI. | ||
| 988 | _aSynthesis Collection of Technology_2009 | ||
| 650 | 7 |
_2embne _9138689 _aMicroelectrónica |
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| 650 | 7 |
_2embne _9139614 _aCircuitos integrados |
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| 776 | 0 | 8 |
_iPrinted edition: _z9783031797903 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031797927 |
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-79791-0 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
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_2lcc _cLE |
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| 998 |
_b05/2023 _dz _eb _zSI |
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