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020 _a9783031017513
024 7 _a10.1007/978-3-031-01751-3
_2doi
040 _aES-MaUEC
_bspa
_cES-MaUEC
_dES-MaUEC
050 4 _aQA76.9.D33
_b2016 EB
100 1 _aSardashti, Somayeh
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_9688447
245 1 2 _aA Primer on Compression in the Memory Hierarchy
_cby Somayeh Sardashti, Angelos Arelakis, Per Stenström, David A. Wood
250 _a1st edition 2016
264 1 _aCham
_bSpringer International Publishing
_c2016
300 _a1 recurso en línea (XVIII, 70 páginas)
336 _atexto
_btxt
_2rdacontent
337 _aelectrónico
_bc
_2rdamedia
338 _arecurso electrónico
_bcr
_2rdacarrier
347 _aarchivo de texto
_bPDF
490 0 _aSynthesis Lectures on Computer Architecture
_x1935-3243
505 0 _aList of Figures -- List of Tables -- Preface -- Acknowledgments -- Introduction -- Compression Algorithms -- Cache Compression -- Memory Compression -- Cache/Memory Link Compression -- Concluding Remarks -- References -- Authors' Biographies .
520 _aThis synthesis lecture presents the current state-of-the-art in applying low-latency, lossless hardware compression algorithms to cache, memory, and the memory/cache link. There are many non-trivial challenges that must be addressed to make data compression work well in this context. First, since compressed data must be decompressed before it can be accessed, decompression latency ends up on the critical memory access path. This imposes a significant constraint on the choice of compression algorithms. Second, while conventional memory systems store fixed-size entities like data types, cache blocks, and memory pages, these entities will suddenly vary in size in a memory system that employs compression. Dealing with variable size entities in a memory system using compression has a significant impact on the way caches are organized and how to manage the resources in main memory. We systematically discuss solutions in the open literature to these problems. Chapter 2 provides the foundations of data compression by first introducing the fundamental concept of value locality. We then introduce a taxonomy of compression algorithms and show how previously proposed algorithms fit within that logical framework. Chapter 3 discusses the different ways that cache memory systems can employ compression, focusing on the trade-offs between latency, capacity, and complexity of alternative ways to compact compressed cache blocks. Chapter 4 discusses issues in applying data compression to main memory and Chapter 5 covers techniques for compressing data on the cache-to-memory links. This book should help a skilled memory system designer understand the fundamental challenges in applying compression to the memory hierarchy and introduce him/her to the state-of-the-art techniques in addressing them.
988 _aSynthesis Collection of Technology_2016
650 7 _2embne
_9679195
_aCompresión de datos (Informática)
700 1 _aArelakis, Angelos
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_9688448
700 1 _aStenström, Per
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_9688449
700 1 _aWood, David A
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
776 0 8 _iPrinted edition:
_z9783031006234
776 0 8 _iPrinted edition:
_z9783031028793
856 4 0 _uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-01751-3
_zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942 _2lcc
_cLE
998 _b05/2023
_dz
_eIG
_zSI