000			03101nam a22004455i 4500
999			_c387852 _d387852
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003			ES-MaUEC
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007			cr nn 008mamaa
008			230422s2010 sz | s |||| 0|eng d
020			_a9783031017261
024	7		_a10.1007/978-3-031-01726-1 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aQA76.9.A3 _b2010 EB
100	1		_aLanzagorta, Marco _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686400
245	1	0	_aIntroduction to Reconfigurable Supercomputing _cby Marco Lanzagorta, Stephen Bique, Robert Rosenberg
250			_a1st edition 2010
264		1	_aCham _bSpringer International Publishing _c2010
300			_a1 recurso en línea (XVI, 87 páginas)
336			_atexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_aarchivo de texto _bPDF
490	0		_aSynthesis Lectures on Computer Architecture _x1935-3243
505	0		_aFPGA Technology -- Reconfigurable Supercomputing -- Algorithmic Considerations -- FPGA Programming Languages -- Case Study: Sorting -- Alternative Technologies and Concluding Remarks.
520			_aThis book covers technologies, applications, tools, languages, procedures, advantages, and disadvantages of reconfigurable supercomputing using Field Programmable Gate Arrays (FPGAs). The target audience is the community of users of High Performance Computers (HPC) who may benefit from porting their applications into a reconfigurable environment. As such, this book is intended to guide the HPC user through the many algorithmic considerations, hardware alternatives, usability issues, programming languages, and design tools that need to be understood before embarking on the creation of reconfigurable parallel codes. We hope to show that FPGA acceleration, based on the exploitation of the data parallelism, pipelining and concurrency remains promising in view of the diminishing improvements in traditional processor and system design. Table of Contents: FPGA Technology / Reconfigurable Supercomputing / Algorithmic Considerations / FPGA Programming Languages / Case Study: Sorting / Alternative Technologies and Concluding Remarks.
988			_aSynthesis Collection of Technology_2010
650		7	_2embne _9468437 _aComputación de altas prestaciones
650		7	_2embne _9161392 _aSistemas informáticos
650		7	_2embne _9667973 _aDispositivos FPGAs
700	1		_aBique, Stephen _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9688221
700	1		_aRosenberg, R. _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9688222
776	0	8	_iPrinted edition: _z9783031005985
776	0	8	_iPrinted edition: _z9783031028540
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-01726-1 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b04/2023 _dz _eIG _zSI