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008			220601s2019 sz | s |||| 0|eng d
020			_a9783031018701
024	7		_a10.1007/978-3-031-01870-1 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aQA76.545 _b2019 EB
100	1		_aSadoghi, Mohammad _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9687056
245	1	0	_aTransaction Processing on Modern Hardware _cby Mohammad Sadoghi, Spyros Blanas.
250			_a1st edition 2019
264		1	_aCham _bSpringer International Publishing _c2019
300			_a1 recurso en línea (XV, 122 páginas)
336			_atexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_aarchivo de texto _bPDF
490	0		_aSynthesis Lectures on Data Management _x2153-5426
505	0		_aIntroduction -- Transaction Concepts -- Multi-Version Concurrency Revisited -- Coordination-Avoidance Concurrency -- Novel Transactional System Architectures -- Hardware-Assisted Transactional Utilities -- Transactions on Heterogeneous Hardware -- Outlook: The Era of Hardware Specialization and Beyond -- Bibliography -- Authors' Biographies.
520			_aThe last decade has brought groundbreaking developments in transaction processing. This resurgence of an otherwise mature research area has spurred from the diminishing cost per GB of DRAM that allows many transaction processing workloads to be entirely memory-resident. This shift demanded a pause to fundamentally rethink the architecture of database systems. The data storage lexicon has now expanded beyond spinning disks and RAID levels to include the cache hierarchy, memory consistency models, cache coherence and write invalidation costs, NUMA regions, and coherence domains. New memory technologies promise fast non-volatile storage and expose unchartered trade-offs for transactional durability, such as exploiting byte-addressable hot and cold storage through persistent programming that promotes simpler recovery protocols. In the meantime, the plateauing single-threaded processor performance has brought massive concurrency within a single node, first in the form of multi-core, and now with many-core and heterogeneous processors. The exciting possibility to reshape the storage, transaction, logging, and recovery layers of next-generation systems on emerging hardware have prompted the database research community to vigorously debate the trade-offs between specialized kernels that narrowly focus on transaction processing performance vs. designs that permit transactionally consistent data accesses from decision support and analytical workloads. In this book, we aim to classify and distill the new body of work on transaction processing that has surfaced in the last decade to navigate researchers and practitioners through this intricate research subject.
988			_aSynthesis Collection of Technology_2019
650		7	_2embne _9166091 _aProceso de datos en tiempo real
650		7	_2embne _9161392 _aSistemas informáticos
700	1		_aBlanas, Spyros _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9687057
776	0	8	_iPrinted edition: _z9783031000973
776	0	8	_iPrinted edition: _z9783031007422
776	0	8	_iPrinted edition: _z9783031029981
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-01870-1 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b02/2023 _dz _esc _zSI