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008			220601s2021 sz | s |||| 0|eng d
020			_a9783031017728
024	7		_a10.1007/978-3-031-01772-8 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aTK7895.M4 _b2021 EB
100	1		_aFujiki, Daichi _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686914
245	1	0	_aIn-/Near-Memory Computing _cby Daichi Fujiki, Xiaowei Wang, Arun Subramaniyan, Reetuparna Das.
250			_a1st edition 2021
264		1	_aCham _bSpringer International Publishing _c2021
300			_a1 recurso en línea (XV, 124 páginas)
336			_atexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_aarchivo de texto _bPDF
490	0		_aSynthesis Lectures on Computer Architecture _x1935-3243
505	0		_aPreface -- Acknowledgments -- Introduction -- Technology Basics and Taxonomy -- Computing with DRAMs -- Computing with SRAMs -- Computing with Non-Volatile Memories -- Domain-Specific Accelerators -- Programming Models -- Closing Thoughts -- Bibliography -- Authors' Biographies.
520			_aThis book provides a structured introduction of the key concepts and techniques that enable in-/near-memory computing. For decades, processing-in-memory or near-memory computing has been attracting growing interest due to its potential to break the memory wall. Near-memory computing moves compute logic near the memory, and thereby reduces data movement. Recent work has also shown that certain memories can morph themselves into compute units by exploiting the physical properties of the memory cells, enabling in-situ computing in the memory array. While in- and near-memory computing can circumvent overheads related to data movement, it comes at the cost of restricted flexibility of data representation and computation, design challenges of compute capable memories, and difficulty in system and software integration. Therefore, wide deployment of in-/near-memory computing cannot be accomplished without techniques that enable efficient mapping of data-intensive applications to such devices, without sacrificing accuracy or increasing hardware costs excessively. This book describes various memory substrates amenable to in- and near-memory computing, architectural approaches for designing efficient and reliable computing devices, and opportunities for in-/near-memory acceleration of different classes of applications.
988			_aSynthesis Collection of Technology_2021
650		7	_2embne _9670359 _aDispositivos de almacenamiento de datos
650		7	_2embne _9673059 _aGestión de memoria
700	1		_aWang, Xiaowei _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686915
700	1		_aSubramaniyan, Arun _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686916
700	1		_aDas, Reetuparna _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686917
776	0	8	_iPrinted edition: _z9783031000690
776	0	8	_iPrinted edition: _z9783031006449
776	0	8	_iPrinted edition: _z9783031029004
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-01772-8 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b02/2023 _dz _esc _zSI