| 000 | 02979nam a22004455i 4500 | ||
|---|---|---|---|
| 999 |
_c387226 _d387226 |
||
| 001 | 387226 | ||
| 003 | ES-MaUEC | ||
| 005 | 20230215181352.0 | ||
| 006 | a||||fo|||| 00| 0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 220601s2019 sz | s |||| 0|eng d | ||
| 020 | _a9783031017629 | ||
| 024 | 7 |
_a10.1007/978-3-031-01762-9 _2doi |
|
| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
||
| 050 | 4 |
_aQA76.9.M45 _b2019 EB |
|
| 100 | 1 |
_aJain, Akanksha _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686897 |
|
| 245 | 1 | 0 |
_aCache Replacement Policies _cby Akanksha Jain, Calvin Lin |
| 250 | _a1st edition 2019 | ||
| 264 | 1 |
_aCham _bSpringer International Publishing _c2019 |
|
| 300 | _a1 recurso en línea (XV, 71 páginas) | ||
| 336 |
_atexto _btxt _2rdacontent |
||
| 337 |
_aelectrónico _bc _2rdamedia |
||
| 338 |
_arecurso electrónico _bcr _2rdacarrier |
||
| 347 |
_aarchivo de texto _bPDF |
||
| 490 | 0 |
_aSynthesis Lectures on Computer Architecture _x1935-3243 |
|
| 505 | 0 | _aPreface -- Acknowledgments -- Introduction -- A Taxonomy of Cache Replacement Policies -- Coarse-Grained Replacement Policies -- Fine-Grained Replacement Policies -- Richer Considerations -- Conclusions -- Bibliography -- Authors' Biographies. | |
| 520 | _aThis book summarizes the landscape of cache replacement policies for CPU data caches. The emphasis is on algorithmic issues, so the authors start by defining a taxonomy that places previous policies into two broad categories, which they refer to as coarse-grained and fine-grained policies. Each of these categories is then divided into three subcategories that describe different approaches to solving the cache replacement problem, along with summaries of significant work in each category. Richer factors, including solutions that optimize for metrics beyond cache miss rates, that are tailored to multi-core settings, that consider interactions with prefetchers, and that consider new memory technologies, are then explored. The book concludes by discussing trends and challenges for future work. This book, which assumes that readers will have a basic understanding of computer architecture and caches, will be useful to academics and practitioners across the field. | ||
| 988 | _aSynthesis Collection of Technology_2019 | ||
| 650 | 7 |
_2embne _9673059 _aGestión de memoria |
|
| 650 | 7 |
_2embne _9141164 _aMicroprocesadores |
|
| 650 | 7 |
_2embne _9686837 _aMemoria caché |
|
| 700 | 1 |
_aLin, Yun Calvin _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686898 |
|
| 776 | 0 | 8 |
_iPrinted edition: _z9783031000591 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031006340 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031028908 |
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-01762-9 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
| 942 |
_2lcc _cLE |
||
| 998 |
_b02/2023 _dz _esc _zSI |
||