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_c387218 _d387218 |
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| 001 | 387218 | ||
| 003 | ES-MaUEC | ||
| 005 | 20230214174317.0 | ||
| 006 | a||||fo|||| 00| 0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 220601s2015 sz | s |||| 0|eng d | ||
| 020 | _a9783031017476 | ||
| 024 | 7 |
_a10.1007/978-3-031-01747-6 _2doi |
|
| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
||
| 050 | 4 |
_aTK7874.893 _b2015 EB |
|
| 100 | 1 |
_aXie, Yuan, _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686864 _d1973- |
|
| 245 | 1 | 0 |
_aDie-stacking Architecture _cby Yuan Xie, Jishen Zhao |
| 250 | _a1st edition 2015 | ||
| 264 | 1 |
_aCham _bSpringer International Publishing _c2015 |
|
| 300 | _a1 recurso en línea (XIV, 113 páginas) | ||
| 336 |
_atexto _btxt _2rdacontent |
||
| 337 |
_aelectrónico _bc _2rdamedia |
||
| 338 |
_arecurso electrónico _bcr _2rdacarrier |
||
| 347 |
_aarchivo de texto _bPDF |
||
| 490 | 0 |
_aSynthesis Lectures on Computer Architecture _x1935-3243 |
|
| 505 | 0 | _aPreface -- Acknowledgments -- 3D Integration Technology -- Benefits of 3D Integration -- Fine-granularity 3D Processor Design -- Coarse-granularity 3D Processor Design -- 3D GPU Architecture -- 3D Network-on-Chip -- Thermal Analysis and Thermal-aware Design -- Cost Analysis for 3D ICs -- Conclusion -- Bibliography . | |
| 520 | _aThe emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology. | ||
| 988 | _aSynthesis Collection of Technology_2015 | ||
| 650 | 7 |
_2embne _9139614 _aCircuitos integrados |
|
| 650 | 7 |
_2embne _9144554 _aArquitectura de ordenador |
|
| 700 | 1 |
_aZhao, Jishen _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686865 _c(Computer engineer) |
|
| 776 | 0 | 8 |
_iPrinted edition: _z9783031006197 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031028755 |
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-01747-6 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
| 942 |
_2lcc _cLE |
||
| 998 |
_b02/2023 _dz _esc _zSI |
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