| 000 | 03845nam a22004575i 4500 | ||
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| 999 |
_c387212 _d387212 |
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| 001 | 387212 | ||
| 003 | ES-MaUEC | ||
| 005 | 20230214170003.0 | ||
| 006 | a||||fo|||| 00| 0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 220601s2012 sz | s |||| 0|eng d | ||
| 020 | _a9783031017377 | ||
| 024 | 7 |
_a10.1007/978-3-031-01737-7 _2doi |
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| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
||
| 050 | 4 |
_aT385 _b2012 EB |
|
| 100 | 1 |
_aKim, Hyesoon, _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686850 _d1974- |
|
| 245 | 1 | 0 |
_aPerformance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU) _cby Hyesoon Kim, Richard Vuduc, Sara Baghsorkhi, Jee Choi, Wen-mei W. Hwu |
| 250 | _a1st edition 2012 | ||
| 264 | 1 |
_aCham _bSpringer International Publishing _c2012 |
|
| 300 | _a1 recurso en línea (XII, 88 páginas) | ||
| 336 |
_atexto _btxt _2rdacontent |
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| 337 |
_aelectrónico _bc _2rdamedia |
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| 338 |
_arecurso electrónico _bcr _2rdacarrier |
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| 347 |
_aarchivo de texto _bPDF |
||
| 490 | 0 |
_aSynthesis Lectures on Computer Architecture _x1935-3243 |
|
| 505 | 0 | _aGPU Design, Programming, and Trends -- Performance Principles -- From Principles to Practice: Analysis and Tuning -- Using Detailed Performance Analysis to Guide Optimization. | |
| 520 | _aGeneral-purpose graphics processing units (GPGPU) have emerged as an important class of shared memory parallel processing architectures, with widespread deployment in every computer class from high-end supercomputers to embedded mobile platforms. Relative to more traditional multicore systems of today, GPGPUs have distinctly higher degrees of hardware multithreading (hundreds of hardware thread contexts vs. tens), a return to wide vector units (several tens vs. 1-10), memory architectures that deliver higher peak memory bandwidth (hundreds of gigabytes per second vs. tens), and smaller caches/scratchpad memories (less than 1 megabyte vs. 1-10 megabytes). In this book, we provide a high-level overview of current GPGPU architectures and programming models. We review the principles that are used in previous shared memory parallel platforms, focusing on recent results in both the theory and practice of parallel algorithms, and suggest a connection to GPGPU platforms. We aim to provide hints to architects about understanding algorithm aspect to GPGPU. We also provide detailed performance analysis and guide optimizations from high-level algorithms to low-level instruction level optimizations. As a case study, we use n-body particle simulations known as the fast multipole method (FMM) as an example. We also briefly survey the state-of-the-art in GPU performance analysis tools and techniques. Table of Contents: GPU Design, Programming, and Trends / Performance Principles / From Principles to Practice: Analysis and Tuning / Using Detailed Performance Analysis to Guide Optimization. | ||
| 988 | _aSynthesis Collection of Technology_2012 | ||
| 650 | 7 |
_2embne _9158747 _aProceso paralelo (Informática) |
|
| 650 | 7 |
_2embne _9141143 _aGráficos de ordenador |
|
| 700 | 1 |
_aVuduc, Richard _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686849 |
|
| 700 | 1 |
_aBaghsorkhi, Sara _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686851 |
|
| 700 | 1 |
_aChoi, Jee _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686852 |
|
| 700 | 1 |
_aHwu, Wen-mei W. _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686853 |
|
| 776 | 0 | 8 |
_iPrinted edition: _z9783031006098 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783031028656 |
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-01737-7 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
| 942 |
_2lcc _cLE |
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| 998 |
_b02/2023 _dz _esc _zSI |
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