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008			220601s2009 sz | s |||| 0|eng d
020			_a9783031797880
024	7		_a10.1007/978-3-031-79788-0 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aTK7868.A79 _b2009 EB
100	1		_aTinder, Richard F. _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9686471 _d1930-2011 _q(Richard Franchere),
245	1	0	_aAsynchronous Sequential Machine Design and Analysis : _bA Comprehensive Development of the Design and Analysis of Clock-Independent State Machines and Systems _cby Richard Tinder
250			_a1st edition 2009
264		1	_aCham _bSpringer International Publishing _c2009
300			_a1 recurso en línea (XV, 235 páginas)
336			_atexto _btxt _2rdacontent
337			_aelectrónico _bc _2rdamedia
338			_arecurso electrónico _bcr _2rdacarrier
347			_aarchivo de texto _bPDF
490	0		_aSynthesis Lectures on Digital Circuits & Systems _x1932-3174
505	0		_aI: Background Fundamentals for Design and Analysis of Asynchronous State Machines -- Introduction and Background -- Simple FSM Design and Initialization -- Detection and Elimination of Timing Defects in Asynchronous FSMs -- Design of Single Transition Time Machines -- Design of One-Hot Asynchronous FSMs -- Design of Pulse Mode FSMs -- Analysis of Asynchronous FSMs -- II: Self-Timed Systems/ Programmable Sequencers, and Arbiters -- Externally Asynchronous/Internally Clocked Systems -- Cascadable Asynchronous Programmable Sequencers (CAPS) and Time-Shared System Design -- Asynchronous One-Hot Programmable Sequencer Systems -- Arbiter Modules.
520			_aAsynchronous Sequential Machine Design and Analysis provides a lucid, in-depth treatment of asynchronous state machine design and analysis presented in two parts: Part I on the background fundamentals related to asynchronous sequential logic circuits generally, and Part II on self-timed systems, high-performance asynchronous programmable sequencers, and arbiters. Part I provides a detailed review of the background fundamentals for the design and analysis of asynchronous finite state machines (FSMs). Included are the basic models, use of fully documented state diagrams, and the design and characteristics of basic memory cells and Muller C-elements. Simple FSMs using C-elements illustrate the design process. The detection and elimination of timing defects in asynchronous FSMs are covered in detail. This is followed by the array algebraic approach to the design of single-transition-time machines and use of CAD software for that purpose, one-hot asynchronous FSMs, and pulse mode FSMs. Part I concludes with the analysis procedures for asynchronous state machines. Part II is concerned mainly with self-timed systems, programmable sequencers, and arbiters. It begins with a detailed treatment of externally asynchronous/internally clocked (or pausable) systems that are delay-insensitive and metastability-hardened. This is followed by defect-free cascadable asynchronous sequencers, and defect-free one-hot asynchronous programmable sequencers--their characteristics, design, and applications. Part II concludes with arbiter modules of various types, those with and without metastability protection, together with applications. Presented in the appendices are brief reviews covering mixed-logic gate symbology, Boolean algebra, and entered-variable K-map minimization. End-of-chapter problems and a glossary of terms, expressions, and abbreviations contribute to the reader's learning experience. Five productivity tools are made available specifically for use with this text and briefly discussed in the Preface. Table of Contents: I: Background Fundamentals for Design and Analysis of Asynchronous State Machines / Introduction and Background / Simple FSM Design and Initialization / Detection and Elimination of Timing Defects in Asynchronous FSMs / Design of Single Transition Time Machines / Design of One-Hot Asynchronous FSMs / Design of Pulse Mode FSMs / Analysis of Asynchronous FSMs / II: Self-Timed Systems/ Programmable Sequencers, and Arbiters / Externally Asynchronous/Internally Clocked Systems / Cascadable Asynchronous Programmable Sequencers (CAPS) and Time-Shared System Design / Asynchronous One-Hot Programmable Sequencer Systems / Arbiter Modules.
988			_aSynthesis Collection of Technology_2009
650		7	_2embne _9684912 _aAutómatas matemáticos
650		7	_2embne _9170229 _aCircuitos electrónicos _xDiseño
776	0	8	_iPrinted edition: _z9783031797873
776	0	8	_iPrinted edition: _z9783031797897
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-031-79788-0 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b01/2023 _dz _esc _zSI