| 000 | 03375nam a22004935i 4500 | ||
|---|---|---|---|
| 999 |
_c368574 _d368574 |
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| 001 | 368574 | ||
| 003 | ES-MaUEC | ||
| 005 | 20230102121748.0 | ||
| 006 | a||||fo|||| 00| 0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 220202s2022 sz | s |||| 0|eng d | ||
| 020 | _a9783030927462 | ||
| 024 | 7 |
_a10.1007/978-3-030-92746-2 _2doi |
|
| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
||
| 050 | 4 |
_aTK5103.25 _b2022 EB |
|
| 100 | 1 |
_aElsayed, Nourhan _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9683574 |
|
| 245 | 1 | 0 |
_aHigh Efficiency Power Amplifier Design for 28 GHz 5G Transmitters _cby Nourhan Elsayed, Hani Saleh, Baker Mohammad, Mohammed Ismail, Mihai Sanduleanu |
| 250 | _aFirst edition 2022 | ||
| 264 | 1 |
_aCham _bSpringer International Publishing _c2022 |
|
| 300 |
_a1 recurso en línea (XVI, 94 páginas) _b91 ilustraciones, 70 ilustraciones a color |
||
| 336 |
_2rdacontent _aTexto _btxt |
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| 337 |
_2rdamedia _aelectrónico _bc |
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| 338 |
_2rdacarrier _arecurso electrónico _bcr |
||
| 347 |
_aarchivo de texto _bPDF |
||
| 490 | 0 |
_aAnalog Circuits and Signal Processing _x2197-1854 |
|
| 505 | 0 | _aIntroduction -- Power Amplifier Fundamentals -- Doherty Power Amplifier Design -- Stacked Class-E Power Amplifier -- Doherty Class-E Power Amplifier -- Inverse Class-D Power Amplifier -- Phased-Array transmitter. | |
| 520 | _aThis book introduces power amplifier design in 22nm FDSOI CMOS dedicated towards 5G applications at 28 GHz and presents 4 state-of-the-art power amplifier designs. The authors discuss power amplifier performance metrics, design trade-offs, and presents different power amplifier classes utilizing efficiency enhancement techniques at 28 GHz. The book presents the design process from theory, simulation, layout, and finally measurement results. Covers thoroughly design steps starting from theory, to simulation, layout and measurement steps; Includes simulation details and comparison with existing state of the art designs; Shows not only the design of the power amplifier block, but also the steps taken to integrate it into a complete phased array transmitter architecture; Discusses design trade-offs at high frequency, including performance metrics and technology limitations, and discusses different ways to overcome them. | ||
| 988 | _aSpringer_Engineering_2022 | ||
| 650 | 7 |
_2embne _aSistemas telefónicos móviles _9152268 |
|
| 650 | 7 |
_2embne _9161180 _aRedes de banda ancha |
|
| 650 | 7 |
_2embne _9670358 _aAmplificadores electrónicos |
|
| 700 | 1 |
_aSaleh, Hani _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9683575 |
|
| 700 | 1 |
_aSanduleanu, Mihai A. T. _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9683578 |
|
| 700 | 1 |
_aIsmail, Mohammed _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9683576 |
|
| 700 | 1 |
_aMohammad, Baker _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _9683701 |
|
| 776 | 0 | 8 |
_iPrinted edition: _z9783030927455 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783030927479 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783030927486 |
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-030-92746-2 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
| 942 |
_2lcc _cLE _n0 |
||
| 998 |
_b04/2022 _dz _esc _zSI |
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