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008			220208s2022 sz | s |||| 0|eng d
020			_a9783030788414
024	7		_a10.1007/978-3-030-78841-4 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aTK7874 _b2022 EB
245	1	0	_aBehavioral Synthesis for Hardware Security _cedited by Srinivas Katkoori, Sheikh Ariful Islam
250			_aFirst edition 2022
264		1	_aCham _bSpringer International Publising _c2022
300			_a1 recurso en línea (XV, 398 páginas) _b154 ilustraciones, 118 ilustraciones a color
336			_2rdacontent _aTexto _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
347			_aarchivo de texto _bPDF
505	0		_aIntroduction -- Background -- Techniques for algorithm-level obfuscation during high-level synthesis -- High-level synthesis of key based obfuscated RTL datapaths -- RTL Hardware IP protection Using Key-Based Control and Data Flow Obfuscation -- Empirical Word-Level Analysis of Arithmetic Module Architectures for Hardware Trojan Susceptibility -- Behavioral synthesis techniques for intellectual property protection -- Exploring Low Cost Optimal Watermark for Reusable IP Cores During High Level Synthesis -- High-Level Synthesis for Side-Channel Defense -- On state encoding against power analysis attacks for finite state controllers -- Examining the consequences of high-level synthesis optimizations on power side-channel -- Towards a timing attack aware high-level synthesis of integrated circuits -- High-Level Synthesis with Timing-Sensitive Information Flow Enforcement -- Mitigating information leakage during critical communication using S*FSM -- Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security-Driven Task Scheduling -- Securing industrial control system with high level synthesis -- Conclusions and open research problems.
520			_aThis book presents state-of-the-art research results from leading electronic design automation (EDA) researchers on automated approaches for generating cyber-secure, smart hardware. The authors first provide brief background on high-level synthesis principles and motivate the need for secure design during behavioral synthesis. Then they provide readers with synthesis techniques for six automated security solutions, namely, hardware obfuscation, hardware Trojan detection, IP watermarking, state encoding, side channel attack resistance, and information flow tracking. Provides a single-source reference to behavioral synthesis for hardware security; Describes automatic synthesis techniques for algorithmic obfuscation, using code transformations; Includes behavioral synthesis techniques for intellectual property protection.
988			_aSpringer_Computer_2022
650		7	_2embne _9139614 _aCircuitos integrados
700	1		_aKatkoori, Srinivas _eeditor literario _4edt _4http://id.loc.gov/vocabulary/relators/edt
700	1		_aIslam, Sheikh Ariful _eeditor literario _4edt _4http://id.loc.gov/vocabulary/relators/edt
773	0		_tSpringer Nature eBook
776	0	8	_iPrinted edition: _z9783030788407
776	0	8	_iPrinted edition: _z9783030788421
776	0	8	_iPrinted edition: _z9783030788438
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-030-78841-4 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE _n0
998			_b03/2022 _dz _eh _zSI