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003			ES-MaUEC
005			20230102114149.0
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007			cr nn nnnaamaa
008			200711s2020 gw a o |||| 0|eng d
020			_a9783030472474
024	7		_a10.1007/978-3-030-47247-4 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aTK7874 _b2020 EB
100	1		_aPassos, Fábio _eautor _4http://id.loc.gov/vocabulary/relators/aut _9675566
245	1	0	_aAutomated Hierarchical Synthesis of Radio-Frequency Integrated Circuits and Systems : _bA Systematic and Multilevel Approach _cby Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
250			_aFirst edition
264		1	_aCham _bSpringer International Publishing _c2020
300			_a1 recurso en línea (XIII, 189 páginas) _b133 ilustraciones, 100 ilustraciones a color
336			_2rdacontent _aTexto _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
347			_aarchivo de texto _bPDF
490	0		_aEngineering (SpringerNature-11647)
490	0		_aEngineering (R0) (SpringerNature-43712)
505	0		_aIntroduction -- RF Receiver Architectures -- Modeling and Synthesis of Radio-Frequency Integrated Inductors -- Systematic Design Methodologies for RF Blocks -- Systematic Circuit Design Methodologies with Layout Considerations -- Multilevel Bottom-up Systematic Design Methodologies -- Conclusions.
520	3		_aThis book describes a new design methodology that allows optimization-based synthesis of RF systems in a hierarchical multilevel approach, in which the system is designed in a bottom-up fashion, from the device level up to the (sub)system level. At each level of the design hierarchy, the authors discuss methods that increase the design robustness and increase the accuracy and efficiency of the simulations. The methodology described enables circuit sizing and layout in a complete and automated integrated manner, achieving optimized designs in significantly less time than with traditional approaches. Describes an efficient and accurate methodology to design automatically RF systems, with guaranteed accuracy from the device to the system level; Discusses analytical and machine learning techniques for modelling integrated inductors and uses such models in synthesis approaches; Compares synthesis strategies for RF circuits based on bottom-up versus flat approaches; Discusses layout-aware bottom-up design methodologies for RF circuits; Discusses variability-aware bottom-up design methodologies for RF circuits; Describes multilevel bottom-up design methodologies from the device up to the system level.
988			_aSpringer_Engineering_03082020
650		7	_2embne _aCircuitos integrados _xDiseño y construcción _9179611
700	1		_aRoca, Elisenda _eautor _4http://id.loc.gov/vocabulary/relators/aut _1http://viaf.org/viaf/27354977 _9675567
700	1		_aLópez Castro, Rafael _eautor _4http://id.loc.gov/vocabulary/relators/aut _9665977
700	1		_aFrancisco V. Fernández _eautor _4http://id.loc.gov/vocabulary/relators/aut _1http://viaf.org/viaf/43584103 _9675569
776	0	8	_iPrinted edition: _z9783030472467
776	0	8	_iPrinted edition: _z9783030472481
776	0	8	_iPrinted edition: _z9783030472498
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-030-47247-4 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b08/2020 _dz _ek _zSI