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| 001 | 120303 | ||
| 003 | ES-MaUEC | ||
| 005 | 20230102114034.0 | ||
| 006 | a||||fo|||| 00| 0 | ||
| 007 | cr nn nnnaamaa | ||
| 008 | 200425s2020 gw a o |||| 0|eng d | ||
| 020 | _a9783030394967 | ||
| 024 | 7 |
_a10.1007/978-3-030-39496-7 _2doi |
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| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
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| 050 | 4 |
_aTK7874 _b2020 EB |
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| 245 | 0 | 4 |
_aThe Fourth Terminal : _bBenefits of Body-Biasing Techniques for FDSOI Circuits and Systems / _cedited by Sylvain Clerc, Thierry Di Gilio, Andreia Cathelin |
| 250 | _aFirst edition | ||
| 264 | 1 |
_aCham _bSpringer International Publishing : _bImprint: Springer _c2020 |
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| 300 |
_a1 recurso en línea (XVI, 431 páginas) _b338 ilustraciones, 284 ilustraciones a color |
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| 336 |
_2rdacontent _aTexto _btxt |
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| 337 |
_2rdamedia _aelectrónico _bc |
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| 338 |
_2rdacarrier _arecurso electrónico _bcr |
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| 347 |
_aArchivo de texto _bPDF |
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| 490 | 0 |
_aIntegrated Circuits and Systems _x1558-9412 |
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| 490 | 0 | _aEngineering (Springer-11647) | |
| 505 | 0 | _aIntroduction -- What for Body Bias -- Design Examples: system and signal path -- Body Bias Voltage Generation and Infrastructure -- Conclusion. | |
| 520 | 3 | _aThis book discusses the advantages and challenges of Body-Biasing for integrated circuits and systems, together with the deployment of the design infrastructure needed to generate this Body-Bias voltage. These new design solutions enable state of the art energy efficiency and system flexibility for the latest applications, such as Internet of Things and 5G communications. Provides readers with a single-source reference to Body-Biasing Techniques for FDSOI Circuits and Systems; Describes integrated circuit design techniques specific to deep submicron Ultra Thin Body and Box Fully-Depleted Silicon on Insulator CMOS technology; Presents the first coherent collection of FDSOI specific design techniques, for applications ranging from analog, RF, mmW to SRAM design, embedded power management and energy efficient digital design. | |
| 988 | _aSpringer_Engineering_23062020 | ||
| 650 | 7 |
_aCircuitos integrados _2embne _9139614 |
|
| 700 | 1 |
_aClerc, Sylvain _eeditor _4edt _4http://id.loc.gov/vocabulary/relators/edt _1http://viaf.org/viaf/304087051 |
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| 700 | 1 |
_aDi Gilio, Thierry _eeditor _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
| 700 | 1 |
_aCathelin, Andreia _eeditor _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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| 710 | 2 |
_aSpringerLink (Online service) _0http://id.loc.gov/authorities/names/no2005046756 _1http://viaf.org/viaf/148105729 |
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| 776 | 0 | 8 |
_iPrinted edition: _z9783030394950 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783030394974 |
| 776 | 0 | 8 |
_iPrinted edition: _z9783030394981 |
| 856 | 4 | 0 |
_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-030-39496-7 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid) |
| 942 |
_2lcc _cLE |
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| 998 |
_b07/2020 _dz _eo _zSI |
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