000			03025nam a22004095i 4500
710	2		_aSpringerLink (Online service) _9106996
999			_c111079 _d111079
001			111079
003			ES-MaUEC
005			20230102113453.0
006			a||||fo|||| 00| 0
007			cr nn nnnaamaa
008			190327s2019 gw a o |||| 0|eng d
020			_a9783030124854
024	7		_a10.1007/978-3-030-12485-4 _2doi
040			_bspa _dES-MaUEC _cES-MaUEC
050		a	_aTK7874 _b2019 EB
100			_aReyserhove, Hans _eautor _4aut _9673252
245	1	0	_aEfficient Design of Variation-Resilient Ultra-Low Energy Digital Processors _cby Hans Reyserhove, Wim Dehaene.
264		1	_aCham _bSpringer International Publishing : _bImprint: Springer _c2019.
300			_a1 recurso en línea (XXIV, 209 páginas) _b141 ilustraciones, 80 ilustraciones a color
336			_2rdacontent _aTexto _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
347			_atext file _bPDF
490	0		_aEngineering (Springer-11647)
505	0		_aChapter 1. Energy-Efficient Processors: Challenges and Solutions -- Chapter 2. Near-Threshold Operation: Technology, Building Blocks and Architecture -- Chapter 3. Efficient VLSI Design Flow -- Chapter 4. Ultra-Low Voltage Microcontrollers -- Chapter 5. Error Detection and Correction -- Chapter 6. Timing Error-Aware Microcontroller -- Chapter 7. Conclusion.
520	3		_aThis book enables readers to achieve ultra-low energy digital system performance. The author's main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy. Presents a full bottom-up micro-electronics approach: circuit-level, design strategy and CAD automation, architecture optimization Motivates discussion with simulation results and/or measurements in an advanced nanometer CMOS process Compares traditional circuit/design/architecture techniques and state-of-the-art, setting the landscape of current best performance and how it can be improved.
988			_aPrimersemestre_2019_Engineering
650		7	_2embne _aCircuitos integrados _xDiseño y construcción _9179611
700			_aDehaene, Wim _eautor _4aut _9673253
776	0	8	_iPrinted edition: _z9783030124847
776	0	8	_iPrinted edition: _z9783030124861
776	0	8	_iPrinted edition: _z9783030124878
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-030-12485-4 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_dz _feng _ggw _h0 _b04/2020 _ea _zSI