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710	2		_aSpringerLink (Online service) _9106996
999			_c110898 _d110898 _x1
001			110898
003			ES-MaUEC
005			20230102113444.0
008			181219s2019 gw a o |||| 0|eng d
020			_a9783030022150
024	7		_a10.1007/978-3-030-02215-0 _2doi
040			_bspa _dES-MaUEC _cES-MaUEC
050		4	_aTK7867 _b2019 EB
245	0	0	_aLanguages, Design Methods, and Tools for Electronic System Design : _bSelected Contributions from FDL 2017 _cedited by Daniel Große, Sara Vinco, Hiren Patel.
264		1	_aCham _bImprint: Springer _c2019
300			_a1 recurso en línea (VII, 130 páginas) _b83 ilustraciones, 73 ilustraciones a color
336			_2rdacontent _aTexto _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
347			_atext file _bPDF
490	0		_aEngineering (Springer-11647)
490	0		_aLecture Notes in Electrical Engineering _x1876-1100 _v530
505	0		_a1. Automatic Integration of HDL IPs in Simulinkusing FMI and S-Function Interfaces -- 2. Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach -- 3. Symbolic Simulation of Dataflow Synchronous Programs with Timers -- 4. Language and Hardware Acceleration Backend for Graph Processing -- 5. Fault Analysis in Analog Circuits through Language Manipulation and Abstraction -- 6. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.
520	3		_aThis book brings together a selection of the best papers from the twentiethedition of the Forum on specification and Design Languages Conference (FDL), which took place on September 18-20, 2017, in Verona, Italy. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Covers modeling and verification methodologies targeting digital and analog systems; Addresses firmware development and validation; Targets both functional and non-functional properties; Includes descriptions of methods for reliable system design.
988			_aPrimersemestre_2019_Engineering
650		7	_2embne _aCircuitos electrónicos _xDiseño _xCongresos y asambleas _9170229
650		7	_2embne _aDiseño asistido por ordenador _xCongresos y asambleas
700	1		_aGroße, Daniel. _eeditor literario _4edt _4http://id.loc.gov/vocabulary/relators/edt
700	1		_aPatel, Hiren. _eeditor literario _4edt _4http://id.loc.gov/vocabulary/relators/edt
700	1		_aVinco, Sara. _eeditor literario _4edt _4http://id.loc.gov/vocabulary/relators/edt
776	0	8	_iPrinted edition: _z9783030022143
776	0	8	_iPrinted edition: _z9783030022167
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-030-02215-0 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_aSI _cm _dz _feng _ggw _h0 _b10/2019 _ek _zSI