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710	2		_aSpringerLink (Online service) _9106996
999			_c110700 _d110700 _x1
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020			_a9789811324932
024	7		_a10.1007/978-981-13-2493-2 _2doi
040			_bspa _dES-MaUEC _cES-MaUEC
050		4	_aTK7874.75 _b2019 EB
100	1		_aJayanthy, S, _eautor _9670568 _d1969-
245	1	0	_aTest Generation of Crosstalk Delay Faults in VLSI Circuits _cby S. Jayanthy, M. C. Bhuvaneswari
264		1	_aSingapore _bSpringer _c2019
300			_a1 recurso en línea (XI, 156 páginas) _b49 ilustraciones, 7 ilustraciones a color
336			_2rdacontent _aTexto _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
347			_atext file _bPDF
490	0		_aEngineering (Springer-11647)
505	0		_aChapter 1. Background and Review of Crosstalk Delay Fault Models and the Crosstalk Effects -- Chapter 2. Review of Test Generation Techniques for Crosstalk Delay Faults -- Chapter 3. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Modified PODEM and FAN Algorithm -- Chapter 4. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults using Single-Objective Genetic Algorithm -- Chapter 5. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Single-Objective Particle Swarm Optimization -- Chapter 6. Simulation of Asynchronous Sequential Circuits using Fuzzy Delay Model -- Chapter 7. Simulation Based Test Generation for Crosstalk Delay Faults in Asynchronous Sequential Circuits.
520	3		_aThis book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.
650		7	_2embne _9670141 _aCircuitos integrados VLSI
700	1		_aBhuvaneswari, M. C. _eautor _9670569
776	0	8	_iPrinted edition: _z9789811324925
776	0	8	_iPrinted edition: _z9789811324949
776	0	8	_iPrinted edition: _z9789811347849
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-981-13-2493-2 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
988			_aPrimersemestre_2019_Engineering
998			_aSI _cm _dz _feng _ggw _h0 _b09/2019 _eu _zSI