000			03348nam a22003855i 4500
710	2		_aSpringerLink (Online service) _9106996
999			_c110549 _d110549
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003			ES-MaUEC
005			20230102113426.0
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008			180810s2019 gw a o |||| 0|eng d
020			_a9783319952079
024	7		_a10.1007/978-3-319-95207-9 _2doi
040			_bspa _dES-MaUEC
050		4	_aTK7871.2 2019 EB
100	1		_aPóvoa, Ricardo Filipe Sereno. _eautor
245	1	2	_aA New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain _cby Ricardo Filipe Sereno Póvoa, João Carlos da Palma Goes, Nuno Cavaco Gomes Horta.
264		1	_aCham _bSpringer International Publishing : _bImprint: Springer _c2019.
300			_a1 recurso en línea (XVI, 141 páginas) _b121 ilustraciones, 53 ilustraciones a color
347			_atext file _bPDF
490	0		_aEngineering (Springer-11647)
505	0		_aIntroduction -- Background and State-of-the-art -- Proposed Architectures and Practical Realizations -- Optimization Design and Simulation Results -- Integrated Prototypes and Experimental Evaluation -- Conclusions.
520	3		_aThis book addresses the need for energy-efficient amplifiers, providing gain enhancement strategies, suitable to run in parallel with lower supply voltages, by introducing a new family of single-stage cascode-free amplifiers, with proper design, optimization, fabrication and experimental evaluation. The authors describe several topologies, using the UMC 130 nm CMOS technology node with standard-VT devices, for proof-of-concept, achieving results far beyond what is achievable with a classic single-stage folded-cascode amplifier. Readers will learn about a new family of circuits with a broad range of applications, together with the familiarization with a state-of-the-art electronic design automation methodology used to explore the design space of the proposed circuit family. Introduces a new family of CMOS cascode-free amplifiers with high energy-efficiency and improved gain; Describes innovative circuit topologies: the Voltage-Combiners biased OTA (supplied by a 3.3 V source); the Voltage-Combiners biased OTA with Current Starving, for higher gain and energy-efficiency (supplied by a 3.3 V source); the Folded Voltage-Combiners biased OTA (supplied by sources from 1.2 V to 0.9 V); and a Dynamic Voltage-Combiners biased OTA, for high performance analog-to-digital converters (supplied by a 1.2 V source); Enables readers to reach better results than what is achievable with classic single-stage folded-cascode amplifiers, with state-of-the-art results in the context of dynamically biased amplifiers;.
650		7	_aAmplificadores electrónicos _2embne _9670358
700	1		_aGoes, João Carlos da Palma. _eautor _998155
700	1		_aHorta, Nuno Cavaco Gomes. _eautor
776	0	8	_iPrinted edition: _z9783030069926
776	0	8	_iPrinted edition: _z9783319952062
776	0	8	_iPrinted edition: _z9783319952086
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-319-95207-9 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
988			_aPrimersemestre_2019_Engineering
998			_aSI _a_alco _a_vill _b08/2019 _cm _dz _ea _feng _ggw _h0