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020 _a9783030045166
024 7 _a10.1007/978-3-030-04516-6
_2doi
040 _bspa
_dES-MaUEC
_cES-MaUEC
050 4 _aTK7885.7
_b2019 EB
100 1 _aLaMeres, Brock J.
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_9670975
245 1 0 _aQuick Start Guide to VHDL
_cby Brock J. LaMeres.
264 1 _aCham
_bSpringer International Publishing :
_bImprint: Springer
_c2019.
300 _a1 recurso en línea (XII, 212 páginas)
_b161 ilustraciones, 139 ilustraciones a color
336 _2rdacontent
_aTexto
_btxt
337 _2rdamedia
_aelectrónico
_bc
338 _2rdacarrier
_arecurso electrónico
_bcr
347 _atext file
_bPDF
490 0 _aEngineering (Springer-11647)
505 0 _aThe Modern Digital Design Flow -- VHDL Constructs -- Modeling Concurrent Functionality in VHDL -- Structural Design & Hierarchy -- Modeling Sequential Functionality -- Packages -- Test Benches -- Modeling Sequential Storage & Registers -- Modeling Finite State Machines -- Modeling Counters -- Modeling Memory -- Computer System Design -- Appendix A: List of Worked Examples -- .
520 3 _aThis textbook provides a starter's guide to VHDL. This book can be used in conjunction with a one-semester course in Digital Systems Design or on its own for designers who only need an introduction to the language. This book is designed to provide a bottoms-up approach to learning the VHDL language. This design supports a course in which foundational knowledge is covered before moving into advanced topics. However, this design also supports use as a reference manual. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to "do" after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome. A comprehensive coverage of the basic capability of VHDL; Emphasizes examples from which students can learn: contains a solved example for nearly every section in the book; Includes more than 400 exercise problems, as well as concept check questions for each section, tied directly to specific learning outcomes.
650 7 _2embne
_aVHDL (Lenguaje de descripción del soporte físico)
_9160754
776 0 8 _iPrinted edition:
_z9783030045159
776 0 8 _iPrinted edition:
_z9783030045173
856 4 0 _uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-030-04516-6
_zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942 _2lcc
_cLE
988 _aPrimersemestre_2019_Engineering
998 _aSI
_cm
_dz
_feng
_ggw
_h0
_b10/2019
_ejf
_zSI