000 02950nam a22004335i 4500
710 2 _aSpringerLink (Online service)
_9106996
999 _c110357
_d110357
001 110357
003 ES-MaUEC
005 20230102113416.0
006 a||||fo|||| 00| 0
007 cr nn nnnaamaa
008 180702s2019 gw a o |||| 0|eng d
020 _a9783319913070
024 7 _a10.1007/978-3-319-91307-0
_2doi
040 _bspa
_dES-MaUEC
_cES-MaUEC
050 4 _aTK7868.L6
_b2019 EB
100 1 _aBadel, Stéphane
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_9670977
245 1 0 _aDesign Automation for Differential MOS Current-Mode Logic Circuits
_cby Stéphane Badel, Can Baltaci, Alessandro Cevrero, Yusuf Leblebici.
264 1 _aCham
_bSpringer International Publishing :
_bImprint: Springer
_c2019.
300 _a1 recurso en línea (X, 233 páginas)
_b149 ilustraciones, 73 ilustraciones a color
336 _2rdacontent
_aTexto
_btxt
337 _2rdamedia
_aelectrónico
_bc
338 _2rdacarrier
_arecurso electrónico
_bcr
347 _atext file
_bPDF
490 0 _aEngineering (Springer-11647)
505 0 _aIntroduction -- Analysis of MOS Current-Mode Logic Circuits -- Design of MOS Current-Mode Logic Cells -- Design Methodology for MCML Standard Cells -- Design Automation for Differential Circuits -- Design Example I : Low-Noise Encoder Circuit for A/D Converter -- Design Example II : High-Speed Multiplexer -- Design Example III : Grain-128a Stream Cipher -- Design Example IV: DPA Resistant Processor.
520 3 _aThis book discusses the implementation of digital circuits by using MCML gates. Although digital circuit implementation is possible with other elements, such as CMOS gates, MCML implementations can provide superior performance in certain applications. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML. A systematic methodology is presented to build efficient MCML standard-cell libraries, and a complete top-down design flow is shown to implement complex systems using such building blocks.
650 7 _2embne
_aCircuitos lógicos
_9139135
700 1 _aBaltaci, Can
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_9670978
700 1 _aCevrero, Alessandro
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_9670979
700 1 _aLeblebici, Yusuf
_eautor
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_9670980
776 0 8 _iPrinted edition:
_z9783030082192
776 0 8 _iPrinted edition:
_z9783319913063
776 0 8 _iPrinted edition:
_z9783319913087
856 4 0 _uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-319-91307-0
_zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942 _2lcc
_cLE
988 _aPrimersemestre_2019_Engineering
998 _aSI
_cm
_dz
_feng
_ggw
_h0
_b10/2019
_ejf
_zSI