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| 003 | DE-He213 | ||
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| 008 | 180405s2018 si | s |||| 0|eng d | ||
| 020 | _a9789811088841 | ||
| 024 | 7 |
_a10.1007/978-981-10-8884-1 _2doi |
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| 040 |
_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC |
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| 050 | 4 | _aTK7870.17 2018 EB | |
| 100 | 1 |
_aLau, John H _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut |
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| 245 | 1 | 0 |
_aFan-Out Wafer-Level Packaging _cby John H. Lau. |
| 264 | 1 |
_aSingapore _bSpringer Singapore : _bImprint: Springer _c2018. |
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| 300 | _a (1 recurso en línea XX, 303 páginas, 278 ilustraciones, 226 ilustraciones a color) | ||
| 336 |
_2rdacontent _aTexto _btxt |
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| 337 |
_2rdamedia _aelectrónico _bc |
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| 338 |
_2rdacarrier _arecurso electrónico _bcr |
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| 347 |
_atext file _bPDF _2rda |
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| 490 | _aEngineering (Springer-11647) | ||
| 505 | 0 | _aPatent Issues of Fan-out Wafer-Level Packaging -- Flip Chip Technology vs. FOWLP -- Fan-In Wafer-Level Packaging vs. FOWLP -- Embedded Chip Packaging -- FOWLP: Chip-First and Die Face-Down -- FOWLP: Chip-First and Die Face-Up -- FOWLP: Chip-Last or RDL-First -- FOWLP: PoP with FOWLP -- Fan-Out Panel-Level Packaging (FOPLP) -- 3D Integration -- Heterogeneous Integration. | |
| 520 | _aThis comprehensive guide to fan-out wafer-level packaging (FOWLP) technology compares FOWLP with flip chip and fan-in wafer-level packaging. It presents the current knowledge on these key enabling technologies for FOWLP, and discusses several packaging technologies for future trends. The Taiwan Semiconductor Manufacturing Company (TSMC) employed their InFO (integrated fan-out) technology in A10, the application processor for Apple’s iPhone, in 2016, generating great excitement about FOWLP technology throughout the semiconductor packaging community. For many practicing engineers and managers, as well as scientists and researchers, essential details of FOWLP – such as the temporary bonding and de-bonding of the carrier on a reconstituted wafer/panel, epoxy molding compound (EMC) dispensing, compression molding, Cu revealing, RDL fabrication, solder ball mounting, etc. – are not well understood. Intended to help readers learn the basics of problem-solving methods and understand the trade-offs inherent in making system-level decisions quickly, this book serves as a valuable reference guide for all those faced with the challenging problems created by the ever-increasing interest in FOWLP, helps to remove roadblocks, and accelerates the design, materials, process, and manufacturing development of key enabling technologies for FOWLP. | ||
| 650 | 7 |
_aCircuitos integrados _2embne _9139614 |
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| 776 | 0 | 8 |
_iPrinted edition: _z9789811088834 |
| 776 | 0 | 8 |
_iPrinted edition: _z9789811088858 |
| 856 | 4 | 0 | _uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-981-10-8884-1 |
| 942 |
_2lcc _cLE |
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| 998 |
_b03/2019 _dz _ep _feng _ggw _h0 |
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