000			03424nam a22003495i 4500
001			104061
003			DE-He213
005			20240307114546.0
007			cr nn 008mamaa
008			150220s2015 gw | s |||| 0|eng d
020			_a9783319159553
024	7		_a10.1007/978-3-319-15955-3 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC
050		4	_aTK7874 2015 EB
100	1		_aLourenço, Ricardo _eautor
245	1	0	_aAIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing _cby Ricardo Lourenço, Nuno Lourenço, Nuno Horta.
264		1	_aCham _bSpringer International Publishing _c2015
300			_a1 recurso en línea (XI, 64 páginas 35 ilustraciones, 5 ilustraciones a color.)
490	0		_aSpringerBriefs in Computational Intelligence _x2625-3704
505	0		_aIntroduction -- Previous works on automated analog IC sizing -- AIDA-CMK: AIDA-C with MOO framework -- Multi-objective framework implementation -- Kernel validation using CEC2009 benchmarks -- Results for analog IC design -- Conclusion and Future work.
520	3		_aThis work addresses the research and development of an innovative optimization kernel applied to analog integrated circuit (IC) design. Particularly, this works describes the modifications inside the AIDA Framework, an electronic design automation framework fully developed by at the Integrated Circuits Group-LX of the Instituto de Telecomunicações, Lisbon. It focusses on AIDA-CMK, by enhancing AIDA-C, which is the circuit optimizer component of AIDA, with a new multi-objective multi-constraint optimization module that constructs a base for multiple algorithm implementations. The proposed solution implements three approaches to multi-objective multi-constraint optimization, namely, an evolutionary approach with NSGAII, a swarm intelligence approach with MOPSO and stochastic hill climbing approach with MOSA. Moreover, the implemented structure allows the easy hybridization between kernels transforming the previous simple NSGAII optimization module into a more evolved and versatile module supporting multiple single and multi-kernel algorithms.The three multi-objective optimization approaches were validated with CEC2009 benchmarks to constrained multi-objective optimization and tested with real analog IC design problems. The achieved results were compared in terms of performance, using statistical results obtained from multiple independent runs. Finally, some hybrid approaches were also experimented, giving a foretaste to a wide range of opportunities to explore in future work.
650		7	_aCircuitos integrados lineales _2embne _9146595
650		7	_aDiseño asistido por ordenador _2embne _9143900
700	1		_aLourenço, Nuno _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _0http://id.loc.gov/authorities/names/no2010043149 _1http://viaf.org/viaf/435144783002007052151/
700	1		_aHorta, Nuno C. G. _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _1http://viaf.org/viaf/120864246/ _9677277
776	0	8	_iEdición impresa: _z9783319159560
776	0	8	_iEdición impresa: _z9783319159546
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-319-15955-3 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
490	0		_aEngineering (Springer-11647)
988			_aEBSPRINGER_2018
998			_b06/2019 _dz _ek _feng _ggw _h0
999			_c104061 _d104061 _x1