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005			20230102113125.0
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007			cr nn 008mamaa
008			140910s2015 xxu| s |||| 0|eng d
020			_a9781493915569
024	7		_a10.1007/978-1-4939-1556-9 _2doi
040			_bspa _dES-MaUEC
050		4	_aTK7870.17 _b2015 EB
100	1		_aQu, Shichun. _eautor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _1http://viaf.org/viaf/311739654/
245	1	0	_aWafer-Level Chip-Scale Packaging _bAnalog and Power Semiconductor Applications _cby Shichun Qu, Yong Liu.
264		1	_aNew York, NY _bSpringer International Publishing _c2015
300			_a1 recurso en línea (XVII, 322 páginas 314 ilustraciones, 256 ilustraciones a color.)
336			_2rdacontent _aTexto (visual) _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
490	0		_aEngineering (Springer-11647)
505	0		_aChapter 1. Demand and Challenges for Wafer Level Analog and Power Packaging -- Chapter 2. Fan-In Analog Wafer Level Chip Scale Package -- Chapter 3. Fan-Out Analog Wafer Level Chip Scale Package -- Chapter 4. Wafer Level Analog Chip Scale Package Stackable Design -- Chapter 5. Wafer Level Discrete Power MOSFET Package Design -- Chapter 6. Wafer Level Packaging TSV/Stack die for Integration of Analog and Power Solution -- Chapter 7. Thermal Management, Design, Analysis for WLCSP -- Chapter 8. Electrical and Multi-Physics Simulations for Analog and Power WLCSP -- Chapter 9. WLCSP Typical Assembly Process -- Chapter 10. WLCSP Typical Reliability and Test.
520	3		_aThis book presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability, and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials, and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical, and stress modeling methodologies is also provided. This book also: ·         Covers the development of wafer-level power discrete packaging with regular wafer-level design concepts and directly bumping technology ·         Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology ·         Presents the wafer-level analog IC packaging design through fan-in and fan-out with RDLs.
988			_aEBSPRINGER_2018
650		7	_aCircuitos integrados _2embne _9139614
700	1		_aLiu, Yong. _eautor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _0http://id.loc.gov/authorities/names/n85372487 _1http://viaf.org/viaf/42640251/ _943790
776	0	8	_iEdición impresa: _z9781493915552
776	0	8	_iEdición impresa: _z9781493915576
776	0	8	_iEdición impresa: _z9781493954384
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-1-4939-1556-9 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b03/2019 _dz _zSI