000			03283nam a22003255i 4500
001			103315
003			DE-He213
005			20230102113125.0
007			cr nn 008mamaa
008			150129s2015 ii | s |||| 0|eng d
020			_a9788132220411
024	7		_a10.1007/978-81-322-2041-1 _2doi
050		4	_aTK5102.9 _bP875 2015 EB
040			_aES-MaUEC _bspa
100	1		_aPurkayastha, Basab Bijoy _eautor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _1http://viaf.org/viaf/15150940106026602597/
245	1	2	_aA Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel _cby Basab Bijoy Purkayastha, Kandarpa Kumar Sarma.
264		1	_aNew Delhi _bSpringer International Publishing _c2015
300			_a1 recurso en línea (XXI, 244 páginas 118 ilustraciones)
490	0		_aSignals and Communication Technology _x1860-4862
505	0		_aIntroduction -- Transmitter Receiver Techniques -- Modulation Techniques and Signal Processing -- Basic Considerations of PLL and Its Types -- Digital Phased Locked Loop -- Synchronization -- A Zero Crossing Algorithm based Digital Phase Locked Loop -- Least Square Polynomial Fitting based Digital Phase Locked Loop -- A DPLL based Recovery System for Nakagami-m Fading Channel -- Coding Assisted Carrier and Symbol Recovery using DPLL -- Carrier Phase Detection of Rayleigh and Rician Faded Signals using Digital Phase Locked Loop -- DPLL based Square Loop for Carrier Synchronization over Fading Channel -- Conclusions and Future Direction.
520	3		_aThe book reports two approaches of implementation of the essential components of a Digital Phase Locked Loop based system for dealing with wireless channels showing Nakagami-m fading. It is mostly observed in mobile communication. In the first approach, the structure of a Digital phase locked loop (DPLL) based on Zero Crossing (ZC) algorithm is proposed. In a modified form, the structure of a DPLL based systems for dealing with Nakagami-m fading based on Least Square Polynomial Fitting Filter is proposed, which operates at moderate sampling frequencies. A sixth order Least Square Polynomial Fitting (LSPF) block and Roots Approximator (RA) for better phase-frequency detection has been implemented as a replacement of Phase Frequency Detector (PFD) and Loop Filter (LF) of a traditional DPLL, which has helped to attain optimum performance of DPLL. The results of simulation of the proposed DPLL with Nakagami-m fading and QPSK modulation is discussed in detail which shows that the proposed method provides better performance than existing systems of similar type.
650		7	_aProceso de señales _2embne _9150608
700	1		_aSarma, Kandarpa Kumar _eautor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _0http://id.loc.gov/authorities/names/nb2014011649 _1http://viaf.org/viaf/308760242/
776	0	8	_iEdición impresa: _z9788132220428
776	0	8	_iEdición impresa: _z9788132220404
776	0	8	_iEdición impresa: _z9788132229391
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-81-322-2041-1 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
490	0		_aEngineering (Springer-11647)
998			_b03/2019 _dz _ef _feng _ggw _h0
999			_c103315 _d103315 _x1