000			03208nam a22004215i 4500
999			_c102740 _d102740
001			102740
003			DE-He213
005			20230102113057.0
006			a||||fo|||| 00| 0
007			cr nn 008mamaa
008			170802s2018 gw | s |||| 0|eng d
020			_a9783319620121
024	7		_a10.1007/978-3-319-62012-1 _2doi
040			_bspa _cES-MaUEC _dES-MaUEC
050		4	_aTK7888.4 _bL594 2018 EB
100	1		_aLi, Weitao. _eautor. _4aut _4http://id.loc.gov/vocabulary/relators/aut
245	1	0	_aHigh-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications _cby Weitao Li, Fule Li, Zhihua Wang.
264		1	_aCham _bSpringer International Publishing _c2018
300			_a1 recurso en línea (XIV, 171 páginas 141 ilustraciones, 56 ilustraciones a color.)
336			_2rdacontent _aTexto _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
347			_atext file _bPDF
490	0		_aAnalog Circuits and Signal Processing, _x1872-082X
490	0		_aEngineering (Springer-11647)
505	0		_aIntroduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions.
520	3		_aThis book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.
988			_aEBSPRINGER_2018
650		7	_2embne _9139610 _aCircuitos electrónicos
700	1		_aLi, Fule. _eautor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _1http://viaf.org/viaf/171916541/
700	1		_aWang, Zhihua. _eautor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _0http://id.loc.gov/authorities/names/n80111068 _1http://viaf.org/viaf/17154319/
776	0	8	_iEdición impresa: _z9783319620114
776	0	8	_iEdición impresa: _z9783319620138
776	0	8	_iEdición impresa: _z9783319872131
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-319-62012-1 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE