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710	2		_aSpringerLink (Online service) _0http://id.loc.gov/authorities/names/no2005046756 _1http://viaf.org/viaf/274647764/ _9106996
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008			180322s2018 si | s |||| 0|eng d
020			_a9789811085543
024	7		_a10.1007/978-981-10-8554-3 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aQA76.88 _b2018 EB
100	1		_aHaj-Yahya, Jawad _eautor _9673078
245	1	0	_aEnergy Efficient High Performance Processors. _bRecent Approaches for Designing Green High Performance Computing _cby Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay
264		1	_aSingapore _bSpringer International Publishing _c2018
300			_a1 recurso en línea (XIV, 165 páginas) _bilustraciones
336			_2rdacontent _aTexto _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
347			_atext file _bPDF
490	0		_aComputer Architecture and Design Methodologies, _x2367-3478
490	0		_aEngineering (Springer-11647)
505	0		_aIntroduction -- Background -- DOEE: Dynamic Optimization framework for better Energy Efficiency -- Fine-grain Power Breakdown of Modern Out-Of-Order Cores and its implications on Skylake based systems -- Compiler-Directed Power Management for Superscalars -- SEEM: Symbolic Execution for Energy Modeling -- Related Works -- Conclusions and Future Work.
520	3		_aThis book explores energy efficiency techniques for high-performance computing (HPC) systems using power-management methods. Adopting a step-by-step approach, it describes power-management flows, algorithms and mechanism that are employed in modern processors such as Intel Sandy Bridge, Haswell, Skylake and other architectures (e.g. ARM). Further, it includes practical examples and recent studies demonstrating how modem processors dynamically manage wide power ranges, from a few milliwatts in the lowest idle power state, to tens of watts in turbo state. Moreover, the book explains how thermal and power deliveries are managed in the context this huge power range. The book also discusses the different metrics for energy efficiency, presents several methods and applications of the power and energy estimation, and shows how by using innovative power estimation methods and new algorithms modern processors are able to optimize metrics such as power, energy, and performance. Different power estimation tools are presented, including tools that break down the power consumption of modern processors at sub-processor core/thread granularity. The book also investigates software, firmware and hardware coordination methods of reducing power consumption, for example a compiler-assisted power management method to overcome power excursions. Lastly, it examines firmware algorithms for dynamic cache resizing and dynamic voltage and frequency scaling (DVFS) for memory sub-systems.
988			_aEBSPRINGER_2018
650		7	_2embne _aComputación de altas prestaciones _9468437
700	1		_aMendelson, Avi _0http://id.loc.gov/authorities/names/ns2014004754 _1http://viaf.org/viaf/34500694/ _9673079
700	1		_aBen Asher, Yosi _eautor _9673080
700	1		_aChattopadhyay, Anupam _eautor _9673081
776	0	8	_iEdición impresa: _z9789811085536
776	0	8	_iEdición impresa: _z9789811085550
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-981-10-8554-3 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b04/2020 _dz _ek _zSI