000			03062nam a2200385 i 4500
710	2		_aSpringerLink (Online service) _0http://id.loc.gov/authorities/names/no2005046756 _1http://viaf.org/viaf/274647764/ _9106996
999			_c102139 _d102139 _x1
001			102139
003			ES-MaUEC
005			20230102113026.0
006			a||||fo|||| 00| 0
007			cr nn 008mamaa
008			180312s2018 gw a s |||| 0|eng d
020			_a9783319757698
024	7		_a10.1007/978-3-319-75769-8 _2doi
040			_aES-MaUEC _bspa _cES-MaUEC _dES-MaUEC
050		4	_aTK7888.4 _b2018 EB
100	1		_aYazdani, Farhang _eautor _4aut _4http://id.loc.gov/vocabulary/relators/aut _1http://viaf.org/viaf/42153651672055781018/ _9674007
245	1	0	_aFoundations of Heterogeneous Integration : _bAn Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach _cby Farhang Yazdani
264		1	_aCham _bSpringer International Publishing _c2018
300			_a1 recurso en línea (X, 177 páginas) _b155 ilustraciones, 152 ilustraciones a color
336			_2rdacontent _aTexto _btxt
337			_2rdamedia _aelectrónico _bc
338			_2rdacarrier _arecurso electrónico _bcr
347			_atext file _bPDF
490	0		_aEngineering (Springer-11647)
505	0		_aIntroduction -- Wirebond Physical Implementation -- Flip-Chip Physical Implementation -- Substrate Physical Implementation -- Conventional Design Flow -- Pathfinding and Co-Design.
520	3		_aThis book provides a practical, hands-on approach to teach the foundation of 2.5D/3D heterogeneous design. Based on the author's extensive, industrial experience, this book enables integrated circuit design techniques that provide more memory to the logic chip, also allowing for mixing chips and intellectual property blocks from any vendor to build a more complex chip, more efficiently and cost effectively. Various practical examples and industrial projects are presented throughout the book, including questions and term projects at the end of each chapter. This book is a great resource for practicing engineers and can be used at universities to teach a course at the senior undergraduate and graduate level. Provides knowledge and skills necessary to design wirebond, flip chip and system in package (SIP) products; Provides practical solutions for 2.5D/3D memory and logic integration, explaining a complex, multidisciplinary topic in straightforward terms; Demonstrates a unique co-design methodology for optimizing cross domain heterogeneous integration, including examples, pathfinding, packaging strategy, interposer structure, etc.; Includes real, industry-based examples to give readers hands-on practical design experience.
988			_aEBSPRINGER_2018
650		7	_2embne _aCircuitos lógicos _9139135
650		7	_2embne _aIngeniería de sistemas _9138451
856	4	0	_uhttps://go.openathens.net/redirector/universidadeuropea.es?url=https://doi.org/10.1007/978-3-319-75769-8 _zAcceso a este recurso digital (usuarios Universidad Europea de Madrid)
942			_2lcc _cLE
998			_b06/2020 _dz _ek _zSI