Low-power CMOS digital pixel imagers for high-speed uncooled PbSe IR applications / Josep Maria Margarit.
By: Margarit, Josep Maria,, autor
Material type:
E-bookSeries: (Springer theses).Publisher: Cham, Switzerland : Springer, 2017Description: 1 recurso en línea.ISBN: 3319499610; 3319499629; 9783319499611; 9783319499628.Subject: Termografía médica
| Item type | Current library | Collection | Call number | Status | Date due | Barcode | Item holds | |
|---|---|---|---|---|---|---|---|---|
LIBRO-E NO PRÉSTAMO
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Madrid Digital Acceso Electrónico (UEM) | Ciencias e Ingeniería | TA1570 .M374 2017 EB (Browse shelf(Opens below)) | Acceso electrónico | eBook.20022743 |
"Doctoral thesis accepted by Universitat Politècnica de Cataluyna (UPC), Barcelona, Spain."
SpringerLink Springer Engineering eBooks 2017 English+International
Incluye referencias bibliográficas
Introduction -- Frame-Based Smart IR Imagers -- Frame-Free Compact-Pitch IR Imagers -- Pixel Test Chips in 0.35mm and 0.15mm CMOS Technologies -- Imager Test Chips in 2.5mm, 0.35mm and 0.15mm CMOS Technologies -- Conclusions.
This book describes the development of a new low-cost medium wavelength IR (MWIR) monolithic imager technology for high-speed uncooled industrial applications. It takes the baton on the latest technological advances in the field of vapor phase deposition (VPD) PbSe-based MWIR detection accomplished by the industrial partner NIT S.L., adding fundamental knowledge on the investigation of novel VLSI analog and mixed-signal design techniques at circuit and system levels for the development of the readout integrated device attached to the detector. In order to fulfill the operational requirements of VPD PbSe, this work proposes null inter-pixel crosstalk vision sensor architectures based on a digital-only focal plane array (FPA) of configurable pixel sensors. Each digital pixel sensor (DPS) cell is equipped with fast communication modules, self-biasing, offset cancellation, analog-to-digital converter (ADC) and fixed pattern noise (FPN) correction. In-pixel power consumption is minimized by the use of comprehensive MOSFET subthreshold operation.
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