Automatic analog IC sizing and optimization constrained with PVT corners and layout effects / Nuno Lourenço, Ricardo Martins, Nuno Horta
By: Lourenço, Nuno, autor
Contributor(s): Horta, Nuno C. G., autor | Martins, Ricardo (Ferreira Martins), autor
Material type: 
E-bookPublisher: Switzerland : Springer, [2016]Copyright date: 2017Description: 1 recurso en línea (XXVII, 182 páginas) : ilustraciones (algunas a color).ISBN: 3319420372; 9783319420370.Subject: MicroelectrónicaOnline resources: Acceso a este recurso digital (usuarios Universidad Europea de Madrid)
| Item type | Current library | Collection | Call number | Status | Date due | Barcode | Item holds | |
|---|---|---|---|---|---|---|---|---|
LIBRO-E NO PRÉSTAMO
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Madrid Digital Acceso Electrónico (UEM) | Ciencias e Ingeniería | TK7874 .L687 2016 EB (Browse shelf(Opens below)) | Acceso electrónico | eBook.20022073 |
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| TK7874 .H937 2018 EB Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog Circuit Design Advances in Analog Circuit Design 2017 | TK7874 .K339 2015 EB Fractional Linear Systems and Electrical Circuits | TK7874 .K364 2015 EB Micro-Relay Technology for Energy-Efficient Integrated Circuits | TK7874 .L687 2016 EB Automatic analog IC sizing and optimization constrained with PVT corners and layout effects | TK7874 .L893 2018 EB CMOS Integrated Circuit Design for Wireless Power Transfer | TK7874 .M378 2016 EB Analog integrated circuit design automation : placement, routing and parasitic extraction techniques | TK7874 .M384 2016 EB Materials for advanced packaging |
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