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On-Chip Networks, Second Edition / by Natalie Enright Jerger, Tushar Krishna, Li-Shiuan Peh

By: Enright Jerger, Natalie D., autor
Contributor(s): Krishna, Tushar, autor | Peh, Li-Shiuan, autor
Material type: materialTypeLabelE-bookSeries: (Synthesis Lectures on Computer Architecture, 1935-3243).Publisher: Cham : Springer International Publishing, 2017Edition: Second edition 2017.Description: 1 recurso en línea (XX, 192 páginas).ISBN: 9783031017551.Subject: Sistemas embebidos | Redes informáticasOnline resources: Acceso a este recurso digital (usuarios Universidad Europea de Madrid)Digital Resources
Contents:
Preface -- Acknowledgments -- Introduction -- Interface with System Architecture -- Topology -- Routing -- Flow Control -- Router Microarchitecture -- Modeling and Evaluation -- Case Studies -- Conclusions -- References -- Authors' Biographies.
Summary: This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps in on-chip network research. With the rapid advances in this field, we felt it was timely to update and review the state of the art in this second edition. We introduce two new chapters at the end of the book. We have updated the latest research of the past years throughout the book and also expanded our coverage of fundamental concepts to include several research ideas that have now made their way into products and, in our opinion, should be textbook concepts that all on-chip network practitioners should know. For example, these fundamental concepts include message passing, multicast routing, and bubble flow control schemes.
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Holdings
Item type Current library Collection Call number Status Date due Barcode Item holds
LIBRO-E NO PRÉSTAMO LIBRO-E NO PRÉSTAMO Madrid Digital Acceso Electrónico (UEM) Ciencias e Ingeniería TK5105.546 2017 EB (Browse shelf(Opens below)) Acceso electrónico eBook.01112421
Total holds: 0

Preface -- Acknowledgments -- Introduction -- Interface with System Architecture -- Topology -- Routing -- Flow Control -- Router Microarchitecture -- Modeling and Evaluation -- Case Studies -- Conclusions -- References -- Authors' Biographies.

This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps in on-chip network research. With the rapid advances in this field, we felt it was timely to update and review the state of the art in this second edition. We introduce two new chapters at the end of the book. We have updated the latest research of the past years throughout the book and also expanded our coverage of fundamental concepts to include several research ideas that have now made their way into products and, in our opinion, should be textbook concepts that all on-chip network practitioners should know. For example, these fundamental concepts include message passing, multicast routing, and bubble flow control schemes.

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