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Power-Efficient Computer Architectures : Recent Advances / by Magnus Själander, Margaret Martonosi, Stefanos Kaxiras

By: Själander, Magnus,, (1977-), autor
Contributor(s): Martonosi, Margaret, autor | Kaxiras, Stefanos, autor
Material type: materialTypeLabelE-bookSeries: (Synthesis Lectures on Computer Architecture, 1935-3243).Publisher: Cham : Springer International Publishing, 2015Edition: 1st edition 2015.Description: 1 recurso en línea (XII, 88 páginas).ISBN: 9783031017452.Subject: Arquitectura de ordenador | Ahorro de energía eléctrica | Ordenadores -- Suministro de energíaOnline resources: Acceso a este recurso digital (usuarios Universidad Europea de Madrid)Digital Resources
Contents:
Introduction -- Voltage and Frequency Management -- Heterogeneity and Specialization -- Communication and Memory Systems -- Conclusions -- Bibliography -- Authors' Biographies.
Summary: As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture. Table of Contents: Introduction / Voltage and Frequency Management / Heterogeneity and Specialization / Communication and Memory Systems / Conclusions / Bibliography / Authors' Biographies.
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Holdings
Item type Current library Collection Call number Status Date due Barcode Item holds
LIBRO-E NO PRÉSTAMO LIBRO-E NO PRÉSTAMO Madrid Digital Acceso Electrónico (UEM) Ciencias e Ingeniería QA76.9.A73 2015 EB (Browse shelf(Opens below)) Acceso electrónico eBook.01112416
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Introduction -- Voltage and Frequency Management -- Heterogeneity and Specialization -- Communication and Memory Systems -- Conclusions -- Bibliography -- Authors' Biographies.

As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture. Table of Contents: Introduction / Voltage and Frequency Management / Heterogeneity and Specialization / Communication and Memory Systems / Conclusions / Bibliography / Authors' Biographies.

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