Circuit Design on Plastic Foils / by Daniele Raiteri, Eugenio Cantatore, Arthur H.M. van Roermund.
By: Raiteri, Daniele, autor
Contributor(s): Cantatore, Eugenio, autor | van Roermund, Arthur H.M, autor
Material type:
E-bookSeries: (Analog Circuits and Signal Processing, 1872-082X); (Engineering (Springer-11647)).Publisher: Cham : Springer International Publishing, 2015Description: 1 recurso en línea (X, 130 páginas 103 ilustraciones, 53 ilustraciones a color.).ISBN: 9783319114279.Subject: Electrónica analógica
| Item type | Current library | Collection | Call number | Status | Date due | Barcode | Item holds | |
|---|---|---|---|---|---|---|---|---|
LIBRO-E NO PRÉSTAMO
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Madrid Digital Acceso Electrónico (UEM) | Ciencias e Ingeniería | TK7888.4 2015 EB (Browse shelf(Opens below)) | Acceso electrónico | eBook.12112870 |
Introduction -- Applications of large-area electronics on foils -- State of the art in circuit design -- Device modeling and characterization -- Sensor frontend architecture -- Circuit design for analog signal conditioning -- Circuit design for data conversion -- Circuit design for digital processing -- Conclusions.
This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics. The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing. • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.
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