Introduction -- Low-Noise CMOS Image Sensors -- Noise Sources and Mechanisms in CIS -- Detailed Noise Analysis in Low-Noise CMOS Image Sensors -- Noise Reduction in CIS Readout Chains -- Design of a Sub-electron Readout Noise Pixel in a Standard CIS Process -- Characterization of a Sub-electron Readout Noise VGA Imager in a Standard CIS Process -- A Passive Switched-Capacitor Circuit For Correlated Multiple Sampling -- Downscaling Effects Towards Photon Counting Capability in CIS -- An Ultra Low Noise CMOS THz Imager -- Conclusion.

This thesis provides a thorough noise analysis for conventional CIS readout chains, while also presenting and discussing a variety of noise reduction techniques that allow the read noise in standard processes to be optimized. Two physical implementations featuring sub-0.5-electron RMS are subsequently presented to verify the proposed noise reduction techniques and provide a full characterization of a VGA imager. Based on the verified noise calculation, the impact of the technology downscaling on the input-referred noise is also studied. Further, the thesis covers THz CMOS image sensors and presents an original design that achieves ultra-low-noise performance. Last but not least, it provides a comprehensive review of CMOS image sensors.